From patchwork Mon Feb 4 10:40:40 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Tokarev X-Patchwork-Id: 218022 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id BCA4F2C02AD for ; Tue, 5 Feb 2013 05:15:05 +1100 (EST) Received: from localhost ([::1]:50651 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1U2Jdh-00076y-Nx for incoming@patchwork.ozlabs.org; Mon, 04 Feb 2013 05:51:05 -0500 Received: from eggs.gnu.org ([208.118.235.92]:52782) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1U2Jct-0005rJ-EU for qemu-devel@nongnu.org; Mon, 04 Feb 2013 05:50:20 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1U2Jcq-0003Rm-9C for qemu-devel@nongnu.org; Mon, 04 Feb 2013 05:50:15 -0500 Received: from isrv.corpit.ru ([86.62.121.231]:54287) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1U2Jcq-0003RJ-2E; Mon, 04 Feb 2013 05:50:12 -0500 Received: from gandalf.tls.msk.ru (mjt.vpn.tls.msk.ru [192.168.177.99]) by isrv.corpit.ru (Postfix) with ESMTP id 4D692A03F0; Mon, 4 Feb 2013 14:50:11 +0400 (MSK) Received: by gandalf.tls.msk.ru (Postfix, from userid 1000) id F0E12531; Mon, 4 Feb 2013 14:41:27 +0400 (MSK) From: Michael Tokarev To: qemu-devel@nongnu.org Date: Mon, 4 Feb 2013 14:40:40 +0400 Message-Id: <1359974470-17044-31-git-send-email-mjt@msgid.tls.msk.ru> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1359974470-17044-1-git-send-email-mjt@msgid.tls.msk.ru> References: <1359974470-17044-1-git-send-email-mjt@msgid.tls.msk.ru> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 86.62.121.231 Cc: Blue Swirl , Michael Tokarev , "Maciej W. Rozycki" , qemu-stable@nongnu.org, Nathan Froyd Subject: [Qemu-devel] [PATCH 30/60] MIPS: Correct FCR0 initialization X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Nathan Froyd This change addresses a problem where QEMU incorrectly traps on floating-point MADD group instructions with SIGILL, at least while emulating MIPS32r2 processors. These instructions use the COP1X major opcode and include ones like: madd.d $f2,$f4,$f2,$f6 Here's Nathan's original analysis of the problem: "QEMU essentially does: d = find_cpu (cpu_string) // get CPU definition fpu_init (env, d) // initialize fpu state (init FCR0, basically) cpu_reset (env) ...and the cpu_reset call clears all interesting state that fpu_init setup, then proceeds to reinitialize all the CP0 registers...but not FCR0." I have verified this change with system emulation running the GDB test suite for the mips-sde-elf target (o32, big endian, 24Kf CPU emulated), there were 55 progressions and no regressions. Signed-off-by: Maciej W. Rozycki Reviewed-by: Richard Henderson Signed-off-by: Blue Swirl (cherry picked from commit f1cb0951c5298753652a73cfd8efc0b1a82f37de) Signed-off-by: Michael Tokarev --- target-mips/translate.c | 1 + 1 file changed, 1 insertion(+) diff --git a/target-mips/translate.c b/target-mips/translate.c index 5ed58f6..8ff1fab 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -12783,6 +12783,7 @@ void cpu_state_reset(CPUMIPSState *env) env->CP0_SRSConf3 = env->cpu_model->CP0_SRSConf3; env->CP0_SRSConf4_rw_bitmask = env->cpu_model->CP0_SRSConf4_rw_bitmask; env->CP0_SRSConf4 = env->cpu_model->CP0_SRSConf4; + env->active_fpu.fcr0 = env->cpu_model->CP1_fcr0; env->insn_flags = env->cpu_model->insn_flags; #if defined(CONFIG_USER_ONLY)