From patchwork Fri Jan 25 12:53:02 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Graf X-Patchwork-Id: 215738 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 30B6E2C008E for ; Sat, 26 Jan 2013 01:08:43 +1100 (EST) Received: from localhost ([::1]:53701 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TyjxR-0005HL-RW for incoming@patchwork.ozlabs.org; Fri, 25 Jan 2013 09:08:41 -0500 Received: from eggs.gnu.org ([208.118.235.92]:44811) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Tyimm-0007Db-0h for qemu-devel@nongnu.org; Fri, 25 Jan 2013 07:53:41 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Tyimc-000543-GY for qemu-devel@nongnu.org; Fri, 25 Jan 2013 07:53:35 -0500 Received: from cantor2.suse.de ([195.135.220.15]:59339 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Tyimb-00053V-Qk; Fri, 25 Jan 2013 07:53:26 -0500 Received: from relay2.suse.de (unknown [195.135.220.254]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mx2.suse.de (Postfix) with ESMTP id 3B5D6A50F4; Fri, 25 Jan 2013 13:53:25 +0100 (CET) From: Alexander Graf To: qemu-ppc@nongnu.org Date: Fri, 25 Jan 2013 13:53:02 +0100 Message-Id: <1359118384-9555-20-git-send-email-agraf@suse.de> X-Mailer: git-send-email 1.6.0.2 In-Reply-To: <1359118384-9555-1-git-send-email-agraf@suse.de> References: <1359118384-9555-1-git-send-email-agraf@suse.de> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.4.x X-Received-From: 195.135.220.15 Cc: Blue Swirl , Scott Wood , qemu-devel , =?utf-8?q?Aur=C3=A9lien=20Jarno?= Subject: [Qemu-devel] [PATCH 19/21] PPC: e500: fix mpic_iack address X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Scott Wood MPIC+0xa0 is IACK for the current CPU. MPIC+0x200a0 is IACK for CPU 0. This fix allows EPR to work with an SMP target. Signed-off-by: Scott Wood Signed-off-by: Alexander Graf --- hw/ppc/e500.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c index 9ccf4d1..530f929 100644 --- a/hw/ppc/e500.c +++ b/hw/ppc/e500.c @@ -505,7 +505,7 @@ void ppce500_init(PPCE500Params *params) irqs[i][OPENPIC_OUTPUT_CINT] = input[PPCE500_INPUT_CINT]; env->spr[SPR_BOOKE_PIR] = cs->cpu_index = i; env->mpic_iack = MPC8544_CCSRBAR_BASE + - MPC8544_MPIC_REGS_OFFSET + 0x200A0; + MPC8544_MPIC_REGS_OFFSET + 0xa0; ppc_booke_timers_init(cpu, 400000000, PPC_TIMER_E500);