@@ -912,7 +912,7 @@ int main(int argc, char **argv)
cpu_exec_init_all();
/* NOTE: we need to init the CPU at this stage to get
qemu_host_page_size */
- env = cpu_init(cpu_model);
+ env = CPU_GET_ENV(cpu_init(cpu_model));
if (!env) {
fprintf(stderr, "Unable to find CPU definition\n");
exit(1);
@@ -526,7 +526,7 @@ void cpu_abort(CPUArchState *env, const char *fmt, ...)
CPUArchState *cpu_copy(CPUArchState *env)
{
- CPUArchState *new_env = cpu_init(env->cpu_model_str);
+ CPUArchState *new_env = CPU_GET_ENV(cpu_init(env->cpu_model_str));
CPUArchState *next_cpu = new_env->next_cpu;
int cpu_index = new_env->cpu_index;
#if defined(TARGET_HAS_ICE)
@@ -62,7 +62,7 @@ static void clipper_init(QEMUMachineInitArgs *args)
/* Create up to 4 cpus. */
memset(cpus, 0, sizeof(cpus));
for (i = 0; i < smp_cpus; ++i) {
- cpus[i] = cpu_init(cpu_model ? cpu_model : "ev67");
+ cpus[i] = CPU_GET_ENV(cpu_init(cpu_model ? cpu_model : "ev67"));
}
cpus[0]->trap_arg0 = ram_size;
@@ -34,7 +34,7 @@ static void an5206_init(QEMUMachineInitArgs *args)
if (!cpu_model)
cpu_model = "m5206";
- env = cpu_init(cpu_model);
+ env = CPU_GET_ENV(cpu_init(cpu_model));
if (!env) {
hw_error("Unable to find m68k CPU definition\n");
}
@@ -30,7 +30,7 @@ static void dummy_m68k_init(QEMUMachineInitArgs *args)
if (!cpu_model)
cpu_model = "cfv4e";
- env = cpu_init(cpu_model);
+ env = CPU_GET_ENV(cpu_init(cpu_model));
if (!env) {
fprintf(stderr, "Unable to find m68k CPU definition\n");
exit(1);
@@ -203,7 +203,7 @@ static void mcf5208evb_init(QEMUMachineInitArgs *args)
if (!cpu_model)
cpu_model = "m5208";
- env = cpu_init(cpu_model);
+ env = CPU_GET_ENV(cpu_init(cpu_model));
if (!env) {
fprintf(stderr, "Unable to find m68k CPU definition\n");
exit(1);
@@ -107,7 +107,7 @@ static void puv3_init(QEMUMachineInitArgs *args)
cpu_model = "UniCore-II";
}
- env = cpu_init(cpu_model);
+ env = CPU_GET_ENV(cpu_init(cpu_model));
if (!env) {
hw_error("Unable to find CPU definition\n");
}
@@ -51,7 +51,7 @@ static void shix_init(QEMUMachineInitArgs *args)
cpu_model = "any";
printf("Initializing CPU\n");
- env = cpu_init(cpu_model);
+ env = CPU_GET_ENV(cpu_init(cpu_model));
/* Allocate memory space */
printf("Allocating ROM\n");
@@ -3486,7 +3486,7 @@ int main(int argc, char **argv, char **envp)
cpu_exec_init_all();
/* NOTE: we need to init the CPU at this stage to get
qemu_host_page_size */
- env = cpu_init(cpu_model);
+ env = CPU_GET_ENV(cpu_init(cpu_model));
if (!env) {
fprintf(stderr, "Unable to find CPU definition\n");
exit(1);
@@ -290,7 +290,8 @@ struct CPUAlphaState {
int implver;
};
-#define cpu_init cpu_alpha_init
+#define cpu_init(m) ENV_GET_CPU(old_cpu_init(m))
+#define old_cpu_init cpu_alpha_init
#define cpu_exec cpu_alpha_exec
#define cpu_gen_code cpu_alpha_gen_code
#define cpu_signal_handler cpu_alpha_signal_handler
@@ -625,7 +625,8 @@ static inline bool cp_access_ok(CPUARMState *env,
#define TARGET_PHYS_ADDR_SPACE_BITS 40
#define TARGET_VIRT_ADDR_SPACE_BITS 32
-static inline CPUARMState *cpu_init(const char *cpu_model)
+#define cpu_init(m) ENV_GET_CPU(old_cpu_init(m))
+static inline CPUARMState *old_cpu_init(const char *cpu_model)
{
ARMCPU *cpu = cpu_arm_init(cpu_model);
if (cpu) {
@@ -218,7 +218,8 @@ enum {
#define TARGET_PHYS_ADDR_SPACE_BITS 32
#define TARGET_VIRT_ADDR_SPACE_BITS 32
-static inline CPUCRISState *cpu_init(const char *cpu_model)
+#define cpu_init(m) ENV_GET_CPU(old_cpu_init(m))
+static inline CPUCRISState *old_cpu_init(const char *cpu_model)
{
CRISCPU *cpu = cpu_cris_init(cpu_model);
if (cpu == NULL) {
@@ -1034,7 +1034,8 @@ uint64_t cpu_get_tsc(CPUX86State *env);
#define TARGET_VIRT_ADDR_SPACE_BITS 32
#endif
-static inline CPUX86State *cpu_init(const char *cpu_model)
+#define cpu_init(m) ENV_GET_CPU(old_cpu_init(m))
+static inline CPUX86State *old_cpu_init(const char *cpu_model)
{
X86CPU *cpu = cpu_x86_init(cpu_model);
if (cpu == NULL) {
@@ -199,7 +199,8 @@ int cpu_lm32_signal_handler(int host_signum, void *pinfo,
void lm32_translate_init(void);
void cpu_lm32_set_phys_msb_ignore(CPULM32State *env, int value);
-static inline CPULM32State *cpu_init(const char *cpu_model)
+#define cpu_init(m) ENV_GET_CPU(old_cpu_init(m))
+static inline CPULM32State *old_cpu_init(const char *cpu_model)
{
LM32CPU *cpu = cpu_lm32_init(cpu_model);
if (cpu == NULL) {
@@ -214,7 +214,8 @@ void register_m68k_insns (CPUM68KState *env);
#define TARGET_PHYS_ADDR_SPACE_BITS 32
#define TARGET_VIRT_ADDR_SPACE_BITS 32
-#define cpu_init cpu_m68k_init
+#define cpu_init(m) ENV_GET_CPU(old_cpu_init(m))
+#define old_cpu_init cpu_m68k_init
#define cpu_exec cpu_m68k_exec
#define cpu_gen_code cpu_m68k_gen_code
#define cpu_signal_handler cpu_m68k_signal_handler
@@ -295,7 +295,8 @@ enum {
#define TARGET_PHYS_ADDR_SPACE_BITS 32
#define TARGET_VIRT_ADDR_SPACE_BITS 32
-static inline CPUMBState *cpu_init(const char *cpu_model)
+#define cpu_init(m) ENV_GET_CPU(old_cpu_init(m))
+static inline CPUMBState *old_cpu_init(const char *cpu_model)
{
MicroBlazeCPU *cpu = cpu_mb_init(cpu_model);
if (cpu == NULL) {
@@ -632,7 +632,8 @@ int cpu_mips_exec(CPUMIPSState *s);
MIPSCPU *cpu_mips_init(const char *cpu_model);
int cpu_mips_signal_handler(int host_signum, void *pinfo, void *puc);
-static inline CPUMIPSState *cpu_init(const char *cpu_model)
+#define cpu_init(m) ENV_GET_CPU(old_cpu_init(m))
+static inline CPUMIPSState *old_cpu_init(const char *cpu_model)
{
MIPSCPU *cpu = cpu_mips_init(cpu_model);
if (cpu == NULL) {
@@ -386,7 +386,8 @@ int cpu_openrisc_get_phys_data(OpenRISCCPU *cpu,
int *prot, target_ulong address, int rw);
#endif
-static inline CPUOpenRISCState *cpu_init(const char *cpu_model)
+#define cpu_init(m) ENV_GET_CPU(old_cpu_init(m))
+static inline CPUOpenRISCState *old_cpu_init(const char *cpu_model)
{
OpenRISCCPU *cpu = cpu_openrisc_init(cpu_model);
if (cpu) {
@@ -1216,7 +1216,8 @@ static inline uint64_t ppc_dump_gpr(CPUPPCState *env, int gprn)
int ppc_dcr_read (ppc_dcr_t *dcr_env, int dcrn, uint32_t *valp);
int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, uint32_t val);
-static inline CPUPPCState *cpu_init(const char *cpu_model)
+#define cpu_init(m) ENV_GET_CPU(old_cpu_init(m))
+static inline CPUPPCState *old_cpu_init(const char *cpu_model)
{
PowerPCCPU *cpu = cpu_ppc_init(cpu_model);
if (cpu == NULL) {
@@ -345,7 +345,8 @@ static inline void cpu_set_tls(CPUS390XState *env, target_ulong newtls)
env->aregs[1] = newtls & 0xffffffffULL;
}
-#define cpu_init(model) (&cpu_s390x_init(model)->env)
+#define cpu_init(m) ENV_GET_CPU(old_cpu_init(m))
+#define old_cpu_init(model) (&cpu_s390x_init(model)->env)
#define cpu_exec cpu_s390x_exec
#define cpu_gen_code cpu_s390x_gen_code
#define cpu_signal_handler cpu_s390x_signal_handler
@@ -232,7 +232,8 @@ void cpu_load_tlb(CPUSH4State * env);
#include "softfloat.h"
-static inline CPUSH4State *cpu_init(const char *cpu_model)
+#define cpu_init(m) ENV_GET_CPU(old_cpu_init(m))
+static inline CPUSH4State *old_cpu_init(const char *cpu_model)
{
SuperHCPU *cpu = cpu_sh4_init(cpu_model);
if (cpu == NULL) {
@@ -592,7 +592,8 @@ hwaddr cpu_get_phys_page_nofault(CPUSPARCState *env, target_ulong addr,
int cpu_sparc_signal_handler(int host_signum, void *pinfo, void *puc);
#ifndef NO_CPU_IO_DEFS
-static inline CPUSPARCState *cpu_init(const char *cpu_model)
+#define cpu_init(m) ENV_GET_CPU(old_cpu_init(m))
+static inline CPUSPARCState *old_cpu_init(const char *cpu_model)
{
SPARCCPU *cpu = cpu_sparc_init(cpu_model);
if (cpu == NULL) {
@@ -122,7 +122,8 @@ void cpu_asr_write(CPUUniCore32State *env1, target_ulong val, target_ulong mask)
#define UC32_HWCAP_CMOV 4 /* 1 << 2 */
#define UC32_HWCAP_UCF64 8 /* 1 << 3 */
-#define cpu_init uc32_cpu_init
+#define cpu_init(m) ENV_GET_CPU(old_cpu_init(m))
+#define old_cpu_init uc32_cpu_init
#define cpu_exec uc32_cpu_exec
#define cpu_signal_handler uc32_cpu_signal_handler
#define cpu_handle_mmu_fault uc32_cpu_handle_mmu_fault
@@ -375,7 +375,8 @@ typedef struct CPUXtensaState {
XtensaCPU *cpu_xtensa_init(const char *cpu_model);
-static inline CPUXtensaState *cpu_init(const char *cpu_model)
+#define cpu_init(m) ENV_GET_CPU(old_cpu_init(m))
+static inline CPUXtensaState *old_cpu_init(const char *cpu_model)
{
XtensaCPU *cpu = cpu_xtensa_init(cpu_model);
if (cpu == NULL) {
This will allow us to gradually change the existing cpu_init()/cpu_copy() code to use QOM, and to gradually move CPU_COMMON fields to CPUState. The existing implementations were mechanically changed to be called 'old_cpu_init', and a wrapper was added to all architectures. Later the wrappers and old implementations can be replaced by proper QOM-based ones. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> --- bsd-user/main.c | 2 +- exec.c | 2 +- hw/alpha_dp264.c | 2 +- hw/an5206.c | 2 +- hw/dummy_m68k.c | 2 +- hw/mcf5208.c | 2 +- hw/puv3.c | 2 +- hw/shix.c | 2 +- linux-user/main.c | 2 +- target-alpha/cpu.h | 3 ++- target-arm/cpu.h | 3 ++- target-cris/cpu.h | 3 ++- target-i386/cpu.h | 3 ++- target-lm32/cpu.h | 3 ++- target-m68k/cpu.h | 3 ++- target-microblaze/cpu.h | 3 ++- target-mips/cpu.h | 3 ++- target-openrisc/cpu.h | 3 ++- target-ppc/cpu.h | 3 ++- target-s390x/cpu.h | 3 ++- target-sh4/cpu.h | 3 ++- target-sparc/cpu.h | 3 ++- target-unicore32/cpu.h | 3 ++- target-xtensa/cpu.h | 3 ++- 24 files changed, 39 insertions(+), 24 deletions(-)