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[93.34.169.1]) by mx.google.com with ESMTPS id n7sm9466138pav.26.2012.10.24.06.01.24 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 24 Oct 2012 06:01:26 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Date: Wed, 24 Oct 2012 14:59:00 +0200 Message-Id: <1351083542-15272-31-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.7.12.1 In-Reply-To: <1351083542-15272-1-git-send-email-pbonzini@redhat.com> References: <1351083542-15272-1-git-send-email-pbonzini@redhat.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 209.85.210.45 Cc: peter.maydell@linaro.org, aliguori@us.ibm.com Subject: [Qemu-devel] [PATCH 30/32] fpu: move public header file to include/fpu X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Signed-off-by: Paolo Bonzini --- configure | 2 +- fpu/softfloat.c | 2 +- {fpu => include/fpu}/softfloat.h | 0 include/qemu/bswap.h | 2 +- linux-user/arm/nwfpe/double_cpdo.c | 2 +- linux-user/arm/nwfpe/extended_cpdo.c | 2 +- linux-user/arm/nwfpe/fpa11.h | 2 +- linux-user/arm/nwfpe/fpa11_cpdt.c | 2 +- linux-user/arm/nwfpe/fpa11_cprt.c | 2 +- linux-user/arm/nwfpe/fpopcode.c | 2 +- linux-user/arm/nwfpe/single_cpdo.c | 2 +- target-alpha/cpu.h | 2 +- target-alpha/fpu_helper.c | 2 +- target-alpha/helper.c | 2 +- target-alpha/translate.c | 2 +- target-arm/cpu.h | 2 +- target-i386/cpu.h | 2 +- target-m68k/cpu.h | 2 +- target-microblaze/cpu.h | 2 +- target-mips/cpu.h | 2 +- target-openrisc/cpu.h | 2 +- target-ppc/cpu.h | 2 +- target-s390x/cpu.h | 2 +- target-sh4/cpu.h | 4 +--- target-sparc/cpu.h | 2 +- target-unicore32/cpu.h | 2 +- 26 files changed, 25 insertions(+), 27 deletions(-) rename {fpu => include/fpu}/softfloat.h (100%) diff --git a/configure b/configure index 9329b97..9cb46cb 100755 --- a/configure +++ b/configure @@ -268,7 +268,7 @@ QEMU_CFLAGS="-fno-strict-aliasing $QEMU_CFLAGS" QEMU_CFLAGS="-Wall -Wundef -Wwrite-strings -Wmissing-prototypes $QEMU_CFLAGS" QEMU_CFLAGS="-Wstrict-prototypes -Wredundant-decls $QEMU_CFLAGS" QEMU_CFLAGS="-D_GNU_SOURCE -D_FILE_OFFSET_BITS=64 -D_LARGEFILE_SOURCE $QEMU_CFLAGS" -QEMU_INCLUDES="-I. -I\$(SRC_PATH) -I\$(SRC_PATH)/include -I\$(SRC_PATH)/fpu" +QEMU_INCLUDES="-I. -I\$(SRC_PATH) -I\$(SRC_PATH)/include" if test "$debug_info" = "yes"; then CFLAGS="-g $CFLAGS" LDFLAGS="-g $LDFLAGS" diff --git a/fpu/softfloat.c b/fpu/softfloat.c index 8413146..0cfa6b4 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -40,7 +40,7 @@ these four paragraphs for those parts of this code that are retained. */ #include "config.h" -#include "softfloat.h" +#include "fpu/softfloat.h" /*---------------------------------------------------------------------------- | Primitive arithmetic functions, including multi-word arithmetic, and diff --git a/fpu/softfloat.h b/include/fpu/softfloat.h similarity index 100% rename from fpu/softfloat.h rename to include/fpu/softfloat.h diff --git a/include/qemu/bswap.h b/include/qemu/bswap.h index cc7f84d..2006fcd 100644 --- a/include/qemu/bswap.h +++ b/include/qemu/bswap.h @@ -4,7 +4,7 @@ #include "config-host.h" #include -#include "softfloat.h" +#include "fpu/softfloat.h" #ifdef CONFIG_MACHINE_BSWAP_H #include diff --git a/linux-user/arm/nwfpe/double_cpdo.c b/linux-user/arm/nwfpe/double_cpdo.c index 8e9b28f..41c28f3 100644 --- a/linux-user/arm/nwfpe/double_cpdo.c +++ b/linux-user/arm/nwfpe/double_cpdo.c @@ -19,7 +19,7 @@ */ #include "fpa11.h" -#include "softfloat.h" +#include "fpu/softfloat.h" #include "fpopcode.h" float64 float64_exp(float64 Fm); diff --git a/linux-user/arm/nwfpe/extended_cpdo.c b/linux-user/arm/nwfpe/extended_cpdo.c index 880ce03..48eca3b 100644 --- a/linux-user/arm/nwfpe/extended_cpdo.c +++ b/linux-user/arm/nwfpe/extended_cpdo.c @@ -19,7 +19,7 @@ */ #include "fpa11.h" -#include "softfloat.h" +#include "fpu/softfloat.h" #include "fpopcode.h" floatx80 floatx80_exp(floatx80 Fm); diff --git a/linux-user/arm/nwfpe/fpa11.h b/linux-user/arm/nwfpe/fpa11.h index 002b3cb..bb9ac65 100644 --- a/linux-user/arm/nwfpe/fpa11.h +++ b/linux-user/arm/nwfpe/fpa11.h @@ -43,7 +43,7 @@ extern CPUARMState *user_registers; /* includes */ #include "fpsr.h" /* FP control and status register definitions */ -#include "softfloat.h" +#include "fpu/softfloat.h" #define typeNone 0x00 #define typeSingle 0x01 diff --git a/linux-user/arm/nwfpe/fpa11_cpdt.c b/linux-user/arm/nwfpe/fpa11_cpdt.c index 3e7a938..007a3d6 100644 --- a/linux-user/arm/nwfpe/fpa11_cpdt.c +++ b/linux-user/arm/nwfpe/fpa11_cpdt.c @@ -20,7 +20,7 @@ */ #include "fpa11.h" -#include "softfloat.h" +#include "fpu/softfloat.h" #include "fpopcode.h" //#include "fpmodule.h" //#include "fpmodule.inl" diff --git a/linux-user/arm/nwfpe/fpa11_cprt.c b/linux-user/arm/nwfpe/fpa11_cprt.c index 8011897..7be93fa 100644 --- a/linux-user/arm/nwfpe/fpa11_cprt.c +++ b/linux-user/arm/nwfpe/fpa11_cprt.c @@ -20,7 +20,7 @@ */ #include "fpa11.h" -#include "softfloat.h" +#include "fpu/softfloat.h" #include "fpopcode.h" #include "fpa11.inl" //#include "fpmodule.h" diff --git a/linux-user/arm/nwfpe/fpopcode.c b/linux-user/arm/nwfpe/fpopcode.c index 82ac92f..0dc5c9c 100644 --- a/linux-user/arm/nwfpe/fpopcode.c +++ b/linux-user/arm/nwfpe/fpopcode.c @@ -19,7 +19,7 @@ */ #include "fpa11.h" -#include "softfloat.h" +#include "fpu/softfloat.h" #include "fpopcode.h" #include "fpsr.h" //#include "fpmodule.h" diff --git a/linux-user/arm/nwfpe/single_cpdo.c b/linux-user/arm/nwfpe/single_cpdo.c index 26168e2..2bfb359 100644 --- a/linux-user/arm/nwfpe/single_cpdo.c +++ b/linux-user/arm/nwfpe/single_cpdo.c @@ -19,7 +19,7 @@ */ #include "fpa11.h" -#include "softfloat.h" +#include "fpu/softfloat.h" #include "fpopcode.h" float32 float32_exp(float32 Fm); diff --git a/target-alpha/cpu.h b/target-alpha/cpu.h index ac61fe4..d756b08 100644 --- a/target-alpha/cpu.h +++ b/target-alpha/cpu.h @@ -29,7 +29,7 @@ #include "exec/cpu-defs.h" -#include "softfloat.h" +#include "fpu/softfloat.h" #define TARGET_HAS_ICE 1 diff --git a/target-alpha/fpu_helper.c b/target-alpha/fpu_helper.c index fe988ec..fad3575 100644 --- a/target-alpha/fpu_helper.c +++ b/target-alpha/fpu_helper.c @@ -19,7 +19,7 @@ #include "cpu.h" #include "helper.h" -#include "softfloat.h" +#include "fpu/softfloat.h" #define FP_STATUS (env->fp_status) diff --git a/target-alpha/helper.c b/target-alpha/helper.c index 81d4763..e2107c3 100644 --- a/target-alpha/helper.c +++ b/target-alpha/helper.c @@ -22,7 +22,7 @@ #include #include "cpu.h" -#include "softfloat.h" +#include "fpu/softfloat.h" #include "helper.h" uint64_t cpu_alpha_load_fpcr (CPUAlphaState *env) diff --git a/target-alpha/translate.c b/target-alpha/translate.c index 6d06cb5..12f994e 100644 --- a/target-alpha/translate.c +++ b/target-alpha/translate.c @@ -611,7 +611,7 @@ static void gen_qual_roundmode(DisasContext *ctx, int fn11) } #if defined(CONFIG_SOFTFLOAT_INLINE) - /* ??? The "softfloat.h" interface is to call set_float_rounding_mode. + /* ??? The "fpu/softfloat.h" interface is to call set_float_rounding_mode. With CONFIG_SOFTFLOAT that expands to an out-of-line call that just sets the one field. */ tcg_gen_st8_i32(tmp, cpu_env, diff --git a/target-arm/cpu.h b/target-arm/cpu.h index e0bda5f..fad64e3 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -29,7 +29,7 @@ #include "qemu-common.h" #include "exec/cpu-defs.h" -#include "softfloat.h" +#include "fpu/softfloat.h" #define TARGET_HAS_ICE 1 diff --git a/target-i386/cpu.h b/target-i386/cpu.h index 470d426..d2efb41 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -46,7 +46,7 @@ #include "exec/cpu-defs.h" -#include "softfloat.h" +#include "fpu/softfloat.h" #define R_EAX 0 #define R_ECX 1 diff --git a/target-m68k/cpu.h b/target-m68k/cpu.h index 7e5523f..a6d96cf 100644 --- a/target-m68k/cpu.h +++ b/target-m68k/cpu.h @@ -28,7 +28,7 @@ #include "qemu-common.h" #include "exec/cpu-defs.h" -#include "softfloat.h" +#include "fpu/softfloat.h" #define MAX_QREGS 32 diff --git a/target-microblaze/cpu.h b/target-microblaze/cpu.h index 2ee2318..2798fc4 100644 --- a/target-microblaze/cpu.h +++ b/target-microblaze/cpu.h @@ -27,7 +27,7 @@ #define CPUArchState struct CPUMBState #include "exec/cpu-defs.h" -#include "softfloat.h" +#include "fpu/softfloat.h" struct CPUMBState; typedef struct CPUMBState CPUMBState; #if !defined(CONFIG_USER_ONLY) diff --git a/target-mips/cpu.h b/target-mips/cpu.h index 13fdd83..18afd1f 100644 --- a/target-mips/cpu.h +++ b/target-mips/cpu.h @@ -13,7 +13,7 @@ #include "qemu-common.h" #include "mips-defs.h" #include "exec/cpu-defs.h" -#include "softfloat.h" +#include "fpu/softfloat.h" struct CPUMIPSState; diff --git a/target-openrisc/cpu.h b/target-openrisc/cpu.h index bb447e7..e989a51 100644 --- a/target-openrisc/cpu.h +++ b/target-openrisc/cpu.h @@ -31,7 +31,7 @@ struct OpenRISCCPU; #include "config.h" #include "qemu-common.h" #include "exec/cpu-defs.h" -#include "softfloat.h" +#include "fpu/softfloat.h" #include "qom/cpu.h" #include "qapi/error.h" diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index 1e746b6..7989554 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -75,7 +75,7 @@ #include "exec/cpu-defs.h" -#include "softfloat.h" +#include "fpu/softfloat.h" #define TARGET_HAS_ICE 1 diff --git a/target-s390x/cpu.h b/target-s390x/cpu.h index ffc2c51..6806453 100644 --- a/target-s390x/cpu.h +++ b/target-s390x/cpu.h @@ -36,7 +36,7 @@ #include "exec/cpu-all.h" -#include "softfloat.h" +#include "fpu/softfloat.h" #define NB_MMU_MODES 3 diff --git a/target-sh4/cpu.h b/target-sh4/cpu.h index 756e9f1..e630ec9 100644 --- a/target-sh4/cpu.h +++ b/target-sh4/cpu.h @@ -41,7 +41,7 @@ #include "exec/cpu-defs.h" -#include "softfloat.h" +#include "fpu/softfloat.h" #define TARGET_PAGE_BITS 12 /* 4k XXXXX */ @@ -230,8 +230,6 @@ static inline void cpu_set_tls(CPUSH4State *env, target_ulong newtls) void cpu_load_tlb(CPUSH4State * env); -#include "softfloat.h" - static inline CPUSH4State *cpu_init(const char *cpu_model) { SuperHCPU *cpu = cpu_sh4_init(cpu_model); diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h index 74e7354..103cb2b 100644 --- a/target-sparc/cpu.h +++ b/target-sparc/cpu.h @@ -27,7 +27,7 @@ #include "exec/cpu-defs.h" -#include "softfloat.h" +#include "fpu/softfloat.h" #define TARGET_HAS_ICE 1 diff --git a/target-unicore32/cpu.h b/target-unicore32/cpu.h index c8abef1..3607232 100644 --- a/target-unicore32/cpu.h +++ b/target-unicore32/cpu.h @@ -24,7 +24,7 @@ #include "config.h" #include "qemu-common.h" #include "exec/cpu-defs.h" -#include "softfloat.h" +#include "fpu/softfloat.h" #define NB_MMU_MODES 2