From patchwork Thu Oct 4 16:55:35 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Graf X-Patchwork-Id: 189206 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 5FBF52C00BE for ; Fri, 5 Oct 2012 02:56:01 +1000 (EST) Received: from localhost ([::1]:46694 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TJoiN-0001we-LH for incoming@patchwork.ozlabs.org; Thu, 04 Oct 2012 12:55:59 -0400 Received: from eggs.gnu.org ([208.118.235.92]:53254) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TJoi9-0001mt-7C for qemu-devel@nongnu.org; Thu, 04 Oct 2012 12:55:53 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TJoi3-00067l-F0 for qemu-devel@nongnu.org; Thu, 04 Oct 2012 12:55:45 -0400 Received: from cantor2.suse.de ([195.135.220.15]:46154 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TJoi3-00067V-8Y; Thu, 04 Oct 2012 12:55:39 -0400 Received: from relay1.suse.de (unknown [195.135.220.254]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mx2.suse.de (Postfix) with ESMTP id 9D9B8A2111; Thu, 4 Oct 2012 18:55:38 +0200 (CEST) From: Alexander Graf To: qemu-devel qemu-devel Date: Thu, 4 Oct 2012 18:55:35 +0200 Message-Id: <1349369735-14997-1-git-send-email-agraf@suse.de> X-Mailer: git-send-email 1.6.0.2 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.4-2.6 X-Received-From: 195.135.220.15 Cc: "qemu-ppc@nongnu.org List" Subject: [Qemu-devel] [PATCH] PPC: e500: Only expose even TLB sizes in initial TLB X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org When booting our e500 machine, we automatically generate a big TLB entry in TLB1 that covers all of the code we need to run in there until the guest can handle its TLB on its own. However, e500v2 can only handle MAS1.0 sizes. However, we keep our TLB information in MAS2.0 layout, which means we have twice as many TLB sizes to choose from. That also means we can run into a situation where we try to add a TLB size that could not fit into the MAS1.0 size bits. Fix it by making sure we always have the lower bit set to 0. That way we are always guaranteed to have MAS1.0 compatible TLB size information. Signed-off-by: Alexander Graf --- hw/ppc/e500.c | 4 ++++ 1 files changed, 4 insertions(+), 0 deletions(-) diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c index feb712e..d23f9b2 100644 --- a/hw/ppc/e500.c +++ b/hw/ppc/e500.c @@ -362,6 +362,10 @@ static void mmubooke_create_initial_mapping(CPUPPCState *env) the device tree top */ dt_end = bi->dt_base + bi->dt_size; ps = booke206_page_size_to_tlb(dt_end) + 1; + if (ps & 1) { + /* e500v2 can only do even TLB size bits */ + ps++; + } size = (ps << MAS1_TSIZE_SHIFT); tlb->mas1 = MAS1_VALID | size; tlb->mas2 = 0;