From patchwork Sun Sep 9 21:04:42 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 182736 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id EBFC42C0087 for ; Mon, 10 Sep 2012 09:09:56 +1000 (EST) Received: from localhost ([::1]:51905 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TAojJ-00007A-Hu for incoming@patchwork.ozlabs.org; Sun, 09 Sep 2012 17:07:45 -0400 Received: from eggs.gnu.org ([208.118.235.92]:56302) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TAoiW-00073D-EJ for qemu-devel@nongnu.org; Sun, 09 Sep 2012 17:06:58 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TAoiU-0005wX-GB for qemu-devel@nongnu.org; Sun, 09 Sep 2012 17:06:56 -0400 Received: from mail-pb0-f45.google.com ([209.85.160.45]:59699) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TAoiU-0005pQ-9y for qemu-devel@nongnu.org; Sun, 09 Sep 2012 17:06:54 -0400 Received: by mail-pb0-f45.google.com with SMTP id rp12so291958pbb.4 for ; Sun, 09 Sep 2012 14:06:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references; bh=wzns8syD9Ryv3stCnV9Dgce/WNG1xM4Ebj7hqYpcdsM=; b=YvOe4JXhZCRGInZ2nPzc8uqEU992sram+lAXAVj1W6OVLGa6ALyLatth6m4uRPOO+W djYaqpaaHZB5gJrdPsMZZARviDHUGJB/E+HvHJd0rXO2avLsOYdUGtMvZA3hbJXQ9ahv 8YhA2EeXBeL8nldwQ/q258VGUW52R8xIBk+WPk/NdYyMzqmDAHQ325l25U2X5lS7vnjH VaSKyFl7CrVmNC9cd7nxBrCife886bqTNE2QLQXDgk1D5/VXMDbypSGqC04Hlzgcf2xZ 035L4oYH+YGF0jrrwJjhUUFPNFxHVlZzgMsr43pGLL6NwAjGBlEgz5tUNDYK141QC+Ps L8xQ== Received: by 10.68.223.3 with SMTP id qq3mr2030819pbc.88.1347224814040; Sun, 09 Sep 2012 14:06:54 -0700 (PDT) Received: from anchor.twiddle.home ([173.160.232.49]) by mx.google.com with ESMTPS id tw5sm662053pbc.48.2012.09.09.14.06.53 (version=TLSv1/SSLv3 cipher=OTHER); Sun, 09 Sep 2012 14:06:53 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Sun, 9 Sep 2012 14:04:42 -0700 Message-Id: <1347224784-19472-25-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 1.7.11.4 In-Reply-To: <1347224784-19472-1-git-send-email-rth@twiddle.net> References: <1347224784-19472-1-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 209.85.160.45 Cc: Alexander Graf Subject: [Qemu-devel] [PATCH 024/126] target-s390: Convert STORE X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Signed-off-by: Richard Henderson --- target-s390x/insn-data.def | 16 +++++++++++ target-s390x/translate.c | 67 +++++++++++++++++----------------------------- 2 files changed, 40 insertions(+), 43 deletions(-) diff --git a/target-s390x/insn-data.def b/target-s390x/insn-data.def index 8e348b2..692795f 100644 --- a/target-s390x/insn-data.def +++ b/target-s390x/insn-data.def @@ -249,6 +249,22 @@ D(0xa50a, OILH, RI_a, Z, r1_o, i2_16u, r1, 0, ori, 0, 0x1010) D(0xa50b, OILL, RI_a, Z, r1_o, i2_16u, r1, 0, ori, 0, 0x1000) +/* STORE */ + C(0x5000, ST, RX_a, Z, r1_o, a2, 0, 0, st32, 0) + C(0xe350, STY, RXY_a, LD, r1_o, a2, 0, 0, st32, 0) + C(0xe324, STG, RXY_a, Z, r1_o, a2, 0, 0, st64, 0) +/* STORE RELATIVE LONG */ + C(0xc40f, STRL, RIL_b, GIE, r1_o, ri2, 0, 0, st32, 0) + C(0xc40b, STGRL, RIL_b, GIE, r1_o, ri2, 0, 0, st64, 0) +/* STORE CHARACTER */ + C(0x4200, STC, RX_a, Z, r1_o, a2, 0, 0, st8, 0) + C(0xe372, STCY, RXY_a, LD, r1_o, a2, 0, 0, st8, 0) +/* STORE HALFWORD */ + C(0x4000, STH, RX_a, Z, r1_o, a2, 0, 0, st16, 0) + C(0xe370, STHY, RXY_a, LD, r1_o, a2, 0, 0, st16, 0) +/* STORE HALFWORD RELATIVE LONG */ + C(0xc407, STHRL, RIL_b, GIE, r1_o, ri2, 0, 0, st16, 0) + /* SUBTRACT */ C(0x1b00, SR, RR_a, Z, r1, r2, new, r1_32, sub, subs32) C(0xb9f9, SRK, RRF_a, DO, r2, r3, new, r1_32, sub, subs32) diff --git a/target-s390x/translate.c b/target-s390x/translate.c index ab8bcf9..cb82fdd 100644 --- a/target-s390x/translate.c +++ b/target-s390x/translate.c @@ -1366,9 +1366,6 @@ static void disas_e3(DisasContext* s, int op, int r1, int x2, int b2, int d2) store_reg16(r1, tmp32_1); tcg_temp_free_i32(tmp32_1); break; - case 0x24: /* stg r1, d2(x2,b2) */ - tcg_gen_qemu_st64(regs[r1], addr, get_mem_index(s)); - break; case 0x3e: /* STRV R1,D2(X2,B2) [RXY] */ tmp32_1 = load_reg32(r1); tmp2 = tcg_temp_new_i64(); @@ -1378,22 +1375,6 @@ static void disas_e3(DisasContext* s, int op, int r1, int x2, int b2, int d2) tcg_gen_qemu_st32(tmp2, addr, get_mem_index(s)); tcg_temp_free_i64(tmp2); break; - case 0x50: /* STY R1,D2(X2,B2) [RXY] */ - tmp32_1 = load_reg32(r1); - tmp2 = tcg_temp_new_i64(); - tcg_gen_extu_i32_i64(tmp2, tmp32_1); - tcg_temp_free_i32(tmp32_1); - tcg_gen_qemu_st32(tmp2, addr, get_mem_index(s)); - tcg_temp_free_i64(tmp2); - break; - case 0x72: /* STCY R1,D2(X2,B2) [RXY] */ - tmp32_1 = load_reg32(r1); - tmp2 = tcg_temp_new_i64(); - tcg_gen_ext_i32_i64(tmp2, tmp32_1); - tcg_gen_qemu_st8(tmp2, addr, get_mem_index(s)); - tcg_temp_free_i32(tmp32_1); - tcg_temp_free_i64(tmp2); - break; case 0x73: /* ICY R1,D2(X2,B2) [RXY] */ tmp3 = tcg_temp_new_i64(); tcg_gen_qemu_ld8u(tmp3, addr, get_mem_index(s)); @@ -2921,22 +2902,6 @@ static void disas_s390_insn(DisasContext *s) store_freg32(r1, tmp32_1); tcg_temp_free_i32(tmp32_1); break; - case 0x40: /* STH R1,D2(X2,B2) [RX] */ - insn = ld_code4(s->pc); - tmp = decode_rx(s, insn, &r1, &x2, &b2, &d2); - tmp2 = load_reg(r1); - tcg_gen_qemu_st16(tmp2, tmp, get_mem_index(s)); - tcg_temp_free_i64(tmp); - tcg_temp_free_i64(tmp2); - break; - case 0x42: /* STC R1,D2(X2,B2) [RX] */ - insn = ld_code4(s->pc); - tmp = decode_rx(s, insn, &r1, &x2, &b2, &d2); - tmp2 = load_reg(r1); - tcg_gen_qemu_st8(tmp2, tmp, get_mem_index(s)); - tcg_temp_free_i64(tmp); - tcg_temp_free_i64(tmp2); - break; case 0x43: /* IC R1,D2(X2,B2) [RX] */ insn = ld_code4(s->pc); tmp = decode_rx(s, insn, &r1, &x2, &b2, &d2); @@ -3012,14 +2977,6 @@ static void disas_s390_insn(DisasContext *s) tcg_temp_free_i64(tmp2); tcg_temp_free_i32(tmp32_1); break; - case 0x50: /* st r1, d2(x2, b2) */ - insn = ld_code4(s->pc); - tmp = decode_rx(s, insn, &r1, &x2, &b2, &d2); - tmp2 = load_reg(r1); - tcg_gen_qemu_st32(tmp2, tmp, get_mem_index(s)); - tcg_temp_free_i64(tmp); - tcg_temp_free_i64(tmp2); - break; case 0x5d: /* D R1,D2(X2,B2) [RX] */ insn = ld_code4(s->pc); tmp3 = decode_rx(s, insn, &r1, &x2, &b2, &d2); @@ -4044,6 +4001,30 @@ static ExitStatus op_ori(DisasContext *s, DisasOps *o) return NO_EXIT; } +static ExitStatus op_st8(DisasContext *s, DisasOps *o) +{ + tcg_gen_qemu_st8(o->in1, o->in2, get_mem_index(s)); + return NO_EXIT; +} + +static ExitStatus op_st16(DisasContext *s, DisasOps *o) +{ + tcg_gen_qemu_st16(o->in1, o->in2, get_mem_index(s)); + return NO_EXIT; +} + +static ExitStatus op_st32(DisasContext *s, DisasOps *o) +{ + tcg_gen_qemu_st32(o->in1, o->in2, get_mem_index(s)); + return NO_EXIT; +} + +static ExitStatus op_st64(DisasContext *s, DisasOps *o) +{ + tcg_gen_qemu_st64(o->in1, o->in2, get_mem_index(s)); + return NO_EXIT; +} + static ExitStatus op_sub(DisasContext *s, DisasOps *o) { tcg_gen_sub_i64(o->out, o->in1, o->in2);