From patchwork Fri Sep 7 15:13:28 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aurelien Jarno X-Patchwork-Id: 182408 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 6A6862C009F for ; Sat, 8 Sep 2012 01:13:54 +1000 (EST) Received: from localhost ([::1]:35432 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TA0Fk-0008Q9-EP for incoming@patchwork.ozlabs.org; Fri, 07 Sep 2012 11:13:52 -0400 Received: from eggs.gnu.org ([208.118.235.92]:51642) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TA0FZ-0008GI-2H for qemu-devel@nongnu.org; Fri, 07 Sep 2012 11:13:46 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TA0FX-000420-NO for qemu-devel@nongnu.org; Fri, 07 Sep 2012 11:13:40 -0400 Received: from hall.aurel32.net ([88.191.126.93]:58140) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TA0FX-00041v-ET for qemu-devel@nongnu.org; Fri, 07 Sep 2012 11:13:39 -0400 Received: from [46.27.142.81] (helo=ohm.aurel32.net) by hall.aurel32.net with esmtpsa (TLS1.0:DHE_RSA_AES_128_CBC_SHA1:16) (Exim 4.72) (envelope-from ) id 1TA0FU-00014E-Nh; Fri, 07 Sep 2012 17:13:37 +0200 Received: from aurel32 by ohm.aurel32.net with local (Exim 4.80) (envelope-from ) id 1TA0FT-0002Uh-0Z; Fri, 07 Sep 2012 17:13:35 +0200 From: Aurelien Jarno To: qemu-devel@nongnu.org Date: Fri, 7 Sep 2012 17:13:28 +0200 Message-Id: <1347030808-9528-1-git-send-email-aurelien@aurel32.net> X-Mailer: git-send-email 1.7.10.4 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 3) X-Received-From: 88.191.126.93 Cc: Blue Swirl , Aurelien Jarno Subject: [Qemu-devel] [PATCH] target-sparc: fix fcmp{s, d, q} instructions wrt exception X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org fcmp{s,d,q} instructions are supposed to ignore quiet NaN (contrary to the fcmpe{s,d,q} instructions), but the current code is wrongly setting the NV exception in that case. Moreover the current code is duplicated: first the arguments are checked for NaN to generate an exception, and later in case the comparison is unordered (which can only happens if one of the argument is a NaN), the same check is done to generate an exception. Fix that by calling clear_float_exceptions() followed by check_ieee_exceptions() as for the other floating point instructions. Use the _compare_quiet functions for fcmp{s,d,q} and the _compare ones for fcmpe{s,d,q}. Simplify the flag setting by not clearing a flag that is set the line just below. This fix allows the math glibc testsuite to pass. Cc: Blue Swirl Signed-off-by: Aurelien Jarno --- target-sparc/fop_helper.c | 67 ++++++++++++++++++--------------------------- 1 file changed, 27 insertions(+), 40 deletions(-) diff --git a/target-sparc/fop_helper.c b/target-sparc/fop_helper.c index 9c64ef8..f4b62a5 100644 --- a/target-sparc/fop_helper.c +++ b/target-sparc/fop_helper.c @@ -334,34 +334,28 @@ void helper_fsqrtq(CPUSPARCState *env) } #define GEN_FCMP(name, size, reg1, reg2, FS, E) \ - void glue(helper_, name) (CPUSPARCState *env) \ + void glue(helper_, name) (CPUSPARCState *env) \ { \ - env->fsr &= FSR_FTT_NMASK; \ - if (E && (glue(size, _is_any_nan)(reg1) || \ - glue(size, _is_any_nan)(reg2)) && \ - (env->fsr & FSR_NVM)) { \ - env->fsr |= FSR_NVC; \ - env->fsr |= FSR_FTT_IEEE_EXCP; \ - helper_raise_exception(env, TT_FP_EXCP); \ + int ret; \ + clear_float_exceptions(env); \ + if (E) { \ + ret = glue(size, _compare)(reg1, reg2, &env->fp_status); \ + } else { \ + ret = glue(size, _compare_quiet)(reg1, reg2, \ + &env->fp_status); \ } \ - switch (glue(size, _compare) (reg1, reg2, &env->fp_status)) { \ + check_ieee_exceptions(env); \ + switch (ret) { \ case float_relation_unordered: \ - if ((env->fsr & FSR_NVM)) { \ - env->fsr |= FSR_NVC; \ - env->fsr |= FSR_FTT_IEEE_EXCP; \ - helper_raise_exception(env, TT_FP_EXCP); \ - } else { \ - env->fsr &= ~((FSR_FCC1 | FSR_FCC0) << FS); \ - env->fsr |= (FSR_FCC1 | FSR_FCC0) << FS; \ - env->fsr |= FSR_NVA; \ - } \ + env->fsr |= (FSR_FCC1 | FSR_FCC0) << FS; \ + env->fsr |= FSR_NVA; \ break; \ case float_relation_less: \ - env->fsr &= ~((FSR_FCC1 | FSR_FCC0) << FS); \ + env->fsr &= ~(FSR_FCC1) << FS; \ env->fsr |= FSR_FCC0 << FS; \ break; \ case float_relation_greater: \ - env->fsr &= ~((FSR_FCC1 | FSR_FCC0) << FS); \ + env->fsr &= ~(FSR_FCC0) << FS; \ env->fsr |= FSR_FCC1 << FS; \ break; \ default: \ @@ -370,34 +364,27 @@ void helper_fsqrtq(CPUSPARCState *env) } \ } #define GEN_FCMP_T(name, size, FS, E) \ - void glue(helper_, name)(CPUSPARCState *env, size src1, size src2) \ + void glue(helper_, name)(CPUSPARCState *env, size src1, size src2) \ { \ - env->fsr &= FSR_FTT_NMASK; \ - if (E && (glue(size, _is_any_nan)(src1) || \ - glue(size, _is_any_nan)(src2)) && \ - (env->fsr & FSR_NVM)) { \ - env->fsr |= FSR_NVC; \ - env->fsr |= FSR_FTT_IEEE_EXCP; \ - helper_raise_exception(env, TT_FP_EXCP); \ + int ret; \ + clear_float_exceptions(env); \ + if (E) { \ + ret = glue(size, _compare)(src1, src2, &env->fp_status); \ + } else { \ + ret = glue(size, _compare_quiet)(src1, src2, \ + &env->fp_status); \ } \ - switch (glue(size, _compare) (src1, src2, &env->fp_status)) { \ + check_ieee_exceptions(env); \ + switch (ret) { \ case float_relation_unordered: \ - if ((env->fsr & FSR_NVM)) { \ - env->fsr |= FSR_NVC; \ - env->fsr |= FSR_FTT_IEEE_EXCP; \ - helper_raise_exception(env, TT_FP_EXCP); \ - } else { \ - env->fsr &= ~((FSR_FCC1 | FSR_FCC0) << FS); \ - env->fsr |= (FSR_FCC1 | FSR_FCC0) << FS; \ - env->fsr |= FSR_NVA; \ - } \ + env->fsr |= (FSR_FCC1 | FSR_FCC0) << FS; \ break; \ case float_relation_less: \ - env->fsr &= ~((FSR_FCC1 | FSR_FCC0) << FS); \ + env->fsr &= ~(FSR_FCC1 << FS); \ env->fsr |= FSR_FCC0 << FS; \ break; \ case float_relation_greater: \ - env->fsr &= ~((FSR_FCC1 | FSR_FCC0) << FS); \ + env->fsr &= ~(FSR_FCC0 << FS); \ env->fsr |= FSR_FCC1 << FS; \ break; \ default: \