From patchwork Wed Aug 8 06:25:42 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: pingfan liu X-Patchwork-Id: 175858 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 2048E2C0088 for ; Wed, 8 Aug 2012 16:26:29 +1000 (EST) Received: from localhost ([::1]:60450 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Syzit-000850-1f for incoming@patchwork.ozlabs.org; Wed, 08 Aug 2012 02:26:27 -0400 Received: from eggs.gnu.org ([208.118.235.92]:43643) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Syzic-0007vK-Gd for qemu-devel@nongnu.org; Wed, 08 Aug 2012 02:26:11 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Syzib-0001ss-2X for qemu-devel@nongnu.org; Wed, 08 Aug 2012 02:26:10 -0400 Received: from mail-ob0-f173.google.com ([209.85.214.173]:62109) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Syzia-0001sm-RW for qemu-devel@nongnu.org; Wed, 08 Aug 2012 02:26:08 -0400 Received: by obbta14 with SMTP id ta14so635077obb.4 for ; Tue, 07 Aug 2012 23:26:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=gyW9GtQpHc/IcYtG8v8sm/trGeK4huX0I1I+9K7FbfQ=; b=OXRg1/c0vp/q254Ln/kXlXpA8VszHrSPcpLejpI9mR3pw3yUrwQOvj1kN/yWKkUw6n A9MpbFhLl5Krofmq3T3VOQ/jDs9Piks29GkfLtqM9xPcVh3AFPZnASQ7LdueuK8eu6HE 85qMYhPoQMt66EfJ9q0YpHpdjCIAe2cTf7ewHeb7/GSaxZnuN9STunw708VeUZKxXQ1b SdctJmI86ImHMVfO3DHsmyfq7K2LvK5ZFr41YpuWEMz763Deh8jEUhVsw9fG5z58G/YB KohboEY7mpiLJMpHfyhRkkKH0SXIOx+eDpWI9r2r4bpmxs3e8MAeYtzUGe1us8FDlK08 Jhtg== Received: by 10.182.212.36 with SMTP id nh4mr28290034obc.37.1344407168065; Tue, 07 Aug 2012 23:26:08 -0700 (PDT) Received: from localhost ([202.108.130.138]) by mx.google.com with ESMTPS id l9sm16663932oeg.3.2012.08.07.23.26.06 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 07 Aug 2012 23:26:07 -0700 (PDT) From: Liu Ping Fan To: qemu-devel@nongnu.org Date: Wed, 8 Aug 2012 14:25:42 +0800 Message-Id: <1344407156-25562-2-git-send-email-qemulist@gmail.com> X-Mailer: git-send-email 1.7.4.4 In-Reply-To: <1344407156-25562-1-git-send-email-qemulist@gmail.com> References: <1344407156-25562-1-git-send-email-qemulist@gmail.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 209.85.214.173 Cc: kvm@vger.kernel.org, Stefan Hajnoczi , Marcelo Tosatti , qemulist@gmail.com, Blue Swirl , Avi Kivity , Anthony Liguori , Jan Kiszka , Paolo Bonzini , =?UTF-8?q?Andreas=20F=C3=A4rber?= Subject: [Qemu-devel] [PATCH 01/15] atomic: introduce atomic operations X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Liu Ping Fan If out of global lock, we will be challenged by SMP in low level, so need atomic ops. This file is heavily copied from kernel. Currently, only x86 atomic ops included, and will be extended for other arch for future. Signed-off-by: Liu Ping Fan --- include/qemu/atomic.h | 161 +++++++++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 161 insertions(+), 0 deletions(-) create mode 100644 include/qemu/atomic.h diff --git a/include/qemu/atomic.h b/include/qemu/atomic.h new file mode 100644 index 0000000..8e1fc3e --- /dev/null +++ b/include/qemu/atomic.h @@ -0,0 +1,161 @@ +/* + * Simple interface for atomic operations. + * + * This work is licensed under the terms of the GNU GPL, version 2 or later. + * See the COPYING file in the top-level directory. + * + */ + +#ifndef __QEMU_ATOMIC_H +#define __QEMU_ATOMIC_H 1 + +typedef struct Atomic { + int counter; +} Atomic; + + +#if defined(__i386__) || defined(__x86_64__) + +/** + * * atomic_read - read atomic variable + * * @v: pointer of type Atomic + * * + * * Atomically reads the value of @v. + * */ +static inline int atomic_read(const Atomic *v) +{ + return (*(volatile int *)&(v)->counter); +} + +/** + * * atomic_set - set atomic variable + * * @v: pointer of type Atomic + * * @i: required value + * * + * * Atomically sets the value of @v to @i. + * */ +static inline void atomic_set(Atomic *v, int i) +{ + v->counter = i; +} + +/** + * * atomic_add - add integer to atomic variable + * * @i: integer value to add + * * @v: pointer of type Atomic + * * + * * Atomically adds @i to @v. + * */ +static inline void atomic_add(int i, Atomic *v) +{ + asm volatile("lock; addl %1,%0" + : "+m" (v->counter) + : "ir" (i)); +} + +/** + * * atomic_sub - subtract integer from atomic variable + * * @i: integer value to subtract + * * @v: pointer of type Atomic + * * + * * Atomically subtracts @i from @v. + * */ +static inline void atomic_sub(int i, Atomic *v) +{ + asm volatile("lock; subl %1,%0" + : "+m" (v->counter) + : "ir" (i)); +} + +/** + * * atomic_sub_and_test - subtract value from variable and test result + * * @i: integer value to subtract + * * @v: pointer of type Atomic + * * + * * Atomically subtracts @i from @v and returns + * * true if the result is zero, or false for all + * * other cases. + * */ +static inline int atomic_sub_and_test(int i, Atomic *v) +{ + unsigned char c; + + asm volatile("lock; subl %2,%0; sete %1" + : "+m" (v->counter), "=qm" (c) + : "ir" (i) : "memory"); + return c; +} + +/** + * * atomic_inc - increment atomic variable + * * @v: pointer of type Atomic + * * + * * Atomically increments @v by 1. + * */ +static inline void atomic_inc(Atomic *v) +{ + asm volatile("lock; incl %0" + : "+m" (v->counter)); +} + +/** + * * atomic_dec - decrement atomic variable + * * @v: pointer of type Atomic + * * + * * Atomically decrements @v by 1. + * */ +static inline void atomic_dec(Atomic *v) +{ + asm volatile("lock; decl %0" + : "+m" (v->counter)); +} + +/** + * * atomic_dec_and_test - decrement and test + * * @v: pointer of type Atomic + * * + * * Atomically decrements @v by 1 and + * * returns true if the result is 0, or false for all other + * * cases. + * */ +static inline int atomic_dec_and_test(Atomic *v) +{ + unsigned char c; + + asm volatile("lock; decl %0; sete %1" + : "+m" (v->counter), "=qm" (c) + : : "memory"); + return c != 0; +} + +/** + * * atomic_inc_and_test - increment and test + * * @v: pointer of type Atomic + * * + * * Atomically increments @v by 1 + * * and returns true if the result is zero, or false for all + * * other cases. + * */ +static inline int atomic_inc_and_test(Atomic *v) +{ + unsigned char c; + + asm volatile("lock; incl %0; sete %1" + : "+m" (v->counter), "=qm" (c) + : : "memory"); + return c != 0; +} + +static inline int atomic_add_and_return(int i, Atomic *v) +{ + int ret = i; + + asm volatile ("lock; xaddl %0, %1" + : "+r" (ret), "+m" (v->counter) + : : "memory", "cc"); + + return ret + i; +} +#endif + +#endif