From patchwork Tue Jul 24 10:39:25 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 172820 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 9FB2F2C008F for ; Tue, 24 Jul 2012 20:39:55 +1000 (EST) Received: from localhost ([::1]:57698 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1StcWv-0000pL-NQ for incoming@patchwork.ozlabs.org; Tue, 24 Jul 2012 06:39:53 -0400 Received: from eggs.gnu.org ([208.118.235.92]:56251) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1StcWi-0000oT-J8 for qemu-devel@nongnu.org; Tue, 24 Jul 2012 06:39:47 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1StcWZ-0006Ep-0d for qemu-devel@nongnu.org; Tue, 24 Jul 2012 06:39:40 -0400 Received: from mnementh.archaic.org.uk ([81.2.115.146]:52566) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1StcWY-0006EW-Ox for qemu-devel@nongnu.org; Tue, 24 Jul 2012 06:39:30 -0400 Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.72) (envelope-from ) id 1StcWT-00065O-Kv; Tue, 24 Jul 2012 11:39:25 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 24 Jul 2012 11:39:25 +0100 Message-Id: <1343126365-23371-1-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.2.5 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 2) X-Received-From: 81.2.115.146 Cc: Peter Crosthwaite , Paolo Bonzini , Paul Brook , patches@linaro.org Subject: [Qemu-devel] [PATCH] hw/armv7m_nvic: Fix incorrect default for num-irqs property X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Fix an incorrect default value for the num-irqs property (we were attempting to override it from the default set by the parent class but not succeeding, which meant that the lm3s6965evb model would assert on startup attempting to wire up nonexistent irq lines). Instead of trying to override the parent's Property array, we define an instance_init function which runs after default setup but before user property setting and can just fix up the default value in the gic_state struct. Signed-off-by: Peter Maydell Tested-by: Peter Crosthwaite --- hw/armv7m_nvic.c | 21 ++++++++++++++------- 1 files changed, 14 insertions(+), 7 deletions(-) diff --git a/hw/armv7m_nvic.c b/hw/armv7m_nvic.c index 4867c1d..6a0832e 100644 --- a/hw/armv7m_nvic.c +++ b/hw/armv7m_nvic.c @@ -467,7 +467,7 @@ static int armv7m_nvic_init(SysBusDevice *dev) s->gic.num_cpu = 1; /* Tell the common code we're an NVIC */ s->gic.revision = 0xffffffff; - s->gic.num_irq = s->num_irq; + s->num_irq = s->gic.num_irq; nc->parent_init(dev); gic_init_irqs_and_distributor(&s->gic, s->num_irq); /* The NVIC and system controller register area looks like this: @@ -498,14 +498,21 @@ static int armv7m_nvic_init(SysBusDevice *dev) return 0; } -static Property armv7m_nvic_properties[] = { +static void armv7m_nvic_instance_init(Object *obj) +{ + /* We have a different default value for the num-irq property + * than our superclass. This function runs after qdev init + * has set the defaults from the Property array and before + * any user-specified property setting, so just modify the + * value in the gic_state struct. + */ + gic_state *s = ARM_GIC_COMMON(obj); /* The ARM v7m may have anything from 0 to 496 external interrupt * IRQ lines. We default to 64. Other boards may differ and should - * set this property appropriately. + * set the num-irq property appropriately. */ - DEFINE_PROP_UINT32("num-irq", nvic_state, num_irq, 64), - DEFINE_PROP_END_OF_LIST(), -}; + s->num_irq = 64; +} static void armv7m_nvic_class_init(ObjectClass *klass, void *data) { @@ -518,12 +525,12 @@ static void armv7m_nvic_class_init(ObjectClass *klass, void *data) sdc->init = armv7m_nvic_init; dc->vmsd = &vmstate_nvic; dc->reset = armv7m_nvic_reset; - dc->props = armv7m_nvic_properties; } static TypeInfo armv7m_nvic_info = { .name = TYPE_NVIC, .parent = TYPE_ARM_GIC_COMMON, + .instance_init = armv7m_nvic_instance_init, .instance_size = sizeof(nvic_state), .class_init = armv7m_nvic_class_init, .class_size = sizeof(NVICClass),