diff --git a/hw/exynos4210_pmu.c b/hw/exynos4210_pmu.c
index c12d750..2be7e08 100644
--- a/hw/exynos4210_pmu.c
+++ b/hw/exynos4210_pmu.c
@@ -226,170 +226,174 @@ typedef struct Exynos4210PmuReg {
 } Exynos4210PmuReg;
 
 static const Exynos4210PmuReg exynos4210_pmu_regs[] = {
-    {"OM_STAT", OM_STAT, 0x00000000},
-    {"RTC_CLKO_SEL", RTC_CLKO_SEL, 0x00000000},
-    {"GNSS_RTC_OUT_CTRL", GNSS_RTC_OUT_CTRL, 0x00000001},
-    {"SYSTEM_POWER_DOWN_CTRL", SYSTEM_POWER_DOWN_CTRL, 0x00010000},
-    {"SYSTEM_POWER_DOWN_OPTION", SYSTEM_POWER_DOWN_OPTION, 0x03030000},
-    {"SWRESET", SWRESET, 0x00000000},
-    {"RST_STAT", RST_STAT, 0x00000000},
-    {"WAKEUP_STAT", WAKEUP_STAT, 0x00000000},
-    {"EINT_WAKEUP_MASK", EINT_WAKEUP_MASK, 0x00000000},
-    {"WAKEUP_MASK", WAKEUP_MASK, 0x00000000},
-    {"HDMI_PHY_CONTROL", HDMI_PHY_CONTROL, 0x00960000},
-    {"USBDEVICE_PHY_CONTROL", USBDEVICE_PHY_CONTROL, 0x00000000},
-    {"USBHOST_PHY_CONTROL", USBHOST_PHY_CONTROL, 0x00000000},
-    {"DAC_PHY_CONTROL", DAC_PHY_CONTROL, 0x00000000},
-    {"MIPI_PHY0_CONTROL", MIPI_PHY0_CONTROL, 0x00000000},
-    {"MIPI_PHY1_CONTROL", MIPI_PHY1_CONTROL, 0x00000000},
-    {"ADC_PHY_CONTROL", ADC_PHY_CONTROL, 0x00000001},
-    {"PCIe_PHY_CONTROL", PCIe_PHY_CONTROL, 0x00000000},
-    {"SATA_PHY_CONTROL", SATA_PHY_CONTROL, 0x00000000},
-    {"INFORM0", INFORM0, 0x00000000},
-    {"INFORM1", INFORM1, 0x00000000},
-    {"INFORM2", INFORM2, 0x00000000},
-    {"INFORM3", INFORM3, 0x00000000},
-    {"INFORM4", INFORM4, 0x00000000},
-    {"INFORM5", INFORM5, 0x00000000},
-    {"INFORM6", INFORM6, 0x00000000},
-    {"INFORM7", INFORM7, 0x00000000},
-    {"PMU_DEBUG", PMU_DEBUG, 0x00000000},
-    {"ARM_CORE0_SYS_PWR_REG", ARM_CORE0_SYS_PWR_REG, 0xFFFFFFFF},
-    {"ARM_CORE1_SYS_PWR_REG", ARM_CORE1_SYS_PWR_REG, 0xFFFFFFFF},
-    {"ARM_COMMON_SYS_PWR_REG", ARM_COMMON_SYS_PWR_REG, 0xFFFFFFFF},
-    {"ARM_CPU_L2_0_SYS_PWR_REG", ARM_CPU_L2_0_SYS_PWR_REG, 0xFFFFFFFF},
-    {"ARM_CPU_L2_1_SYS_PWR_REG", ARM_CPU_L2_1_SYS_PWR_REG, 0xFFFFFFFF},
-    {"CMU_ACLKSTOP_SYS_PWR_REG", CMU_ACLKSTOP_SYS_PWR_REG, 0xFFFFFFFF},
-    {"CMU_SCLKSTOP_SYS_PWR_REG", CMU_SCLKSTOP_SYS_PWR_REG, 0xFFFFFFFF},
-    {"CMU_RESET_SYS_PWR_REG", CMU_RESET_SYS_PWR_REG, 0xFFFFFFFF},
-    {"APLL_SYSCLK_SYS_PWR_REG", APLL_SYSCLK_SYS_PWR_REG, 0xFFFFFFFF},
-    {"MPLL_SYSCLK_SYS_PWR_REG", MPLL_SYSCLK_SYS_PWR_REG, 0xFFFFFFFF},
-    {"VPLL_SYSCLK_SYS_PWR_REG", VPLL_SYSCLK_SYS_PWR_REG, 0xFFFFFFFF},
-    {"EPLL_SYSCLK_SYS_PWR_REG", EPLL_SYSCLK_SYS_PWR_REG, 0xFFFFFFFF},
-    {"CMU_CLKSTOP_GPS_ALIVE_SYS_PWR_REG", CMU_CLKSTOP_GPS_ALIVE_SYS_PWR_REG,
-            0xFFFFFFFF},
-    {"CMU_RESET_GPS_ALIVE_SYS_PWR_REG", CMU_RESET_GPS_ALIVE_SYS_PWR_REG,
-            0xFFFFFFFF},
-    {"CMU_CLKSTOP_CAM_SYS_PWR_REG", CMU_CLKSTOP_CAM_SYS_PWR_REG, 0xFFFFFFFF},
-    {"CMU_CLKSTOP_TV_SYS_PWR_REG", CMU_CLKSTOP_TV_SYS_PWR_REG, 0xFFFFFFFF},
-    {"CMU_CLKSTOP_MFC_SYS_PWR_REG", CMU_CLKSTOP_MFC_SYS_PWR_REG, 0xFFFFFFFF},
-    {"CMU_CLKSTOP_G3D_SYS_PWR_REG", CMU_CLKSTOP_G3D_SYS_PWR_REG, 0xFFFFFFFF},
-    {"CMU_CLKSTOP_LCD0_SYS_PWR_REG", CMU_CLKSTOP_LCD0_SYS_PWR_REG, 0xFFFFFFFF},
-    {"CMU_CLKSTOP_LCD1_SYS_PWR_REG", CMU_CLKSTOP_LCD1_SYS_PWR_REG, 0xFFFFFFFF},
-    {"CMU_CLKSTOP_MAUDIO_SYS_PWR_REG", CMU_CLKSTOP_MAUDIO_SYS_PWR_REG,
-            0xFFFFFFFF},
-    {"CMU_CLKSTOP_GPS_SYS_PWR_REG", CMU_CLKSTOP_GPS_SYS_PWR_REG, 0xFFFFFFFF},
-    {"CMU_RESET_CAM_SYS_PWR_REG", CMU_RESET_CAM_SYS_PWR_REG, 0xFFFFFFFF},
-    {"CMU_RESET_TV_SYS_PWR_REG", CMU_RESET_TV_SYS_PWR_REG, 0xFFFFFFFF},
-    {"CMU_RESET_MFC_SYS_PWR_REG", CMU_RESET_MFC_SYS_PWR_REG, 0xFFFFFFFF},
-    {"CMU_RESET_G3D_SYS_PWR_REG", CMU_RESET_G3D_SYS_PWR_REG, 0xFFFFFFFF},
-    {"CMU_RESET_LCD0_SYS_PWR_REG", CMU_RESET_LCD0_SYS_PWR_REG, 0xFFFFFFFF},
-    {"CMU_RESET_LCD1_SYS_PWR_REG", CMU_RESET_LCD1_SYS_PWR_REG, 0xFFFFFFFF},
-    {"CMU_RESET_MAUDIO_SYS_PWR_REG", CMU_RESET_MAUDIO_SYS_PWR_REG, 0xFFFFFFFF},
-    {"CMU_RESET_GPS_SYS_PWR_REG", CMU_RESET_GPS_SYS_PWR_REG, 0xFFFFFFFF},
-    {"TOP_BUS_SYS_PWR_REG", TOP_BUS_SYS_PWR_REG, 0xFFFFFFFF},
-    {"TOP_RETENTION_SYS_PWR_REG", TOP_RETENTION_SYS_PWR_REG, 0xFFFFFFFF},
-    {"TOP_PWR_SYS_PWR_REG", TOP_PWR_SYS_PWR_REG, 0xFFFFFFFF},
-    {"LOGIC_RESET_SYS_PWR_REG", LOGIC_RESET_SYS_PWR_REG, 0xFFFFFFFF},
-    {"OneNANDXL_MEM_SYS_PWR_REG", OneNANDXL_MEM_SYS_PWR_REG, 0xFFFFFFFF},
-    {"MODEMIF_MEM_SYS_PWR_REG", MODEMIF_MEM_SYS_PWR_REG, 0xFFFFFFFF},
-    {"USBDEVICE_MEM_SYS_PWR_REG", USBDEVICE_MEM_SYS_PWR_REG, 0xFFFFFFFF},
-    {"SDMMC_MEM_SYS_PWR_REG", SDMMC_MEM_SYS_PWR_REG, 0xFFFFFFFF},
-    {"CSSYS_MEM_SYS_PWR_REG", CSSYS_MEM_SYS_PWR_REG, 0xFFFFFFFF},
-    {"SECSS_MEM_SYS_PWR_REG", SECSS_MEM_SYS_PWR_REG, 0xFFFFFFFF},
-    {"PCIe_MEM_SYS_PWR_REG", PCIe_MEM_SYS_PWR_REG, 0xFFFFFFFF},
-    {"SATA_MEM_SYS_PWR_REG", SATA_MEM_SYS_PWR_REG, 0xFFFFFFFF},
-    {"PAD_RETENTION_DRAM_SYS_PWR_REG", PAD_RETENTION_DRAM_SYS_PWR_REG,
-            0xFFFFFFFF},
-    {"PAD_RETENTION_MAUDIO_SYS_PWR_REG", PAD_RETENTION_MAUDIO_SYS_PWR_REG,
-            0xFFFFFFFF},
-    {"PAD_RETENTION_GPIO_SYS_PWR_REG", PAD_RETENTION_GPIO_SYS_PWR_REG,
-            0xFFFFFFFF},
-    {"PAD_RETENTION_UART_SYS_PWR_REG", PAD_RETENTION_UART_SYS_PWR_REG,
-            0xFFFFFFFF},
-    {"PAD_RETENTION_MMCA_SYS_PWR_REG", PAD_RETENTION_MMCA_SYS_PWR_REG,
-            0xFFFFFFFF},
-    {"PAD_RETENTION_MMCB_SYS_PWR_REG", PAD_RETENTION_MMCB_SYS_PWR_REG,
-            0xFFFFFFFF},
-    {"PAD_RETENTION_EBIA_SYS_PWR_REG", PAD_RETENTION_EBIA_SYS_PWR_REG,
-            0xFFFFFFFF},
-    {"PAD_RETENTION_EBIB_SYS_PWR_REG", PAD_RETENTION_EBIB_SYS_PWR_REG,
-            0xFFFFFFFF},
-    {"PAD_ISOLATION_SYS_PWR_REG", PAD_ISOLATION_SYS_PWR_REG, 0xFFFFFFFF},
-    {"PAD_ALV_SEL_SYS_PWR_REG", PAD_ALV_SEL_SYS_PWR_REG, 0xFFFFFFFF},
-    {"XUSBXTI_SYS_PWR_REG", XUSBXTI_SYS_PWR_REG, 0xFFFFFFFF},
-    {"XXTI_SYS_PWR_REG", XXTI_SYS_PWR_REG, 0xFFFFFFFF},
-    {"EXT_REGULATOR_SYS_PWR_REG", EXT_REGULATOR_SYS_PWR_REG, 0xFFFFFFFF},
-    {"GPIO_MODE_SYS_PWR_REG", GPIO_MODE_SYS_PWR_REG, 0xFFFFFFFF},
-    {"GPIO_MODE_MAUDIO_SYS_PWR_REG", GPIO_MODE_MAUDIO_SYS_PWR_REG, 0xFFFFFFFF},
-    {"CAM_SYS_PWR_REG", CAM_SYS_PWR_REG, 0xFFFFFFFF},
-    {"TV_SYS_PWR_REG", TV_SYS_PWR_REG, 0xFFFFFFFF},
-    {"MFC_SYS_PWR_REG", MFC_SYS_PWR_REG, 0xFFFFFFFF},
-    {"G3D_SYS_PWR_REG", G3D_SYS_PWR_REG, 0xFFFFFFFF},
-    {"LCD0_SYS_PWR_REG", LCD0_SYS_PWR_REG, 0xFFFFFFFF},
-    {"LCD1_SYS_PWR_REG", LCD1_SYS_PWR_REG, 0xFFFFFFFF},
-    {"MAUDIO_SYS_PWR_REG", MAUDIO_SYS_PWR_REG, 0xFFFFFFFF},
-    {"GPS_SYS_PWR_REG", GPS_SYS_PWR_REG, 0xFFFFFFFF},
-    {"GPS_ALIVE_SYS_PWR_REG", GPS_ALIVE_SYS_PWR_REG, 0xFFFFFFFF},
-    {"ARM_CORE0_CONFIGURATION", ARM_CORE0_CONFIGURATION, 0x00000003},
-    {"ARM_CORE0_STATUS", ARM_CORE0_STATUS, 0x00030003},
-    {"ARM_CORE0_OPTION", ARM_CORE0_OPTION, 0x01010001},
-    {"ARM_CORE1_CONFIGURATION", ARM_CORE1_CONFIGURATION, 0x00000003},
-    {"ARM_CORE1_STATUS", ARM_CORE1_STATUS, 0x00030003},
-    {"ARM_CORE1_OPTION", ARM_CORE1_OPTION, 0x01010001},
-    {"ARM_COMMON_OPTION", ARM_COMMON_OPTION, 0x00000001},
-    {"ARM_CPU_L2_0_CONFIGURATION", ARM_CPU_L2_0_CONFIGURATION, 0x00000003},
-    {"ARM_CPU_L2_0_STATUS", ARM_CPU_L2_0_STATUS, 0x00000003},
-    {"ARM_CPU_L2_1_CONFIGURATION", ARM_CPU_L2_1_CONFIGURATION, 0x00000003},
-    {"ARM_CPU_L2_1_STATUS", ARM_CPU_L2_1_STATUS, 0x00000003},
-    {"PAD_RETENTION_MAUDIO_OPTION", PAD_RETENTION_MAUDIO_OPTION, 0x00000000},
-    {"PAD_RETENTION_GPIO_OPTION", PAD_RETENTION_GPIO_OPTION, 0x00000000},
-    {"PAD_RETENTION_UART_OPTION", PAD_RETENTION_UART_OPTION, 0x00000000},
-    {"PAD_RETENTION_MMCA_OPTION", PAD_RETENTION_MMCA_OPTION, 0x00000000},
-    {"PAD_RETENTION_MMCB_OPTION", PAD_RETENTION_MMCB_OPTION, 0x00000000},
-    {"PAD_RETENTION_EBIA_OPTION", PAD_RETENTION_EBIA_OPTION, 0x00000000},
-    {"PAD_RETENTION_EBIB_OPTION", PAD_RETENTION_EBIB_OPTION, 0x00000000},
-    {"PS_HOLD_CONTROL", PS_HOLD_CONTROL, 0x00005200},
-    {"XUSBXTI_CONFIGURATION", XUSBXTI_CONFIGURATION, 0x00000001},
-    {"XUSBXTI_STATUS", XUSBXTI_STATUS, 0x00000001},
-    {"XUSBXTI_DURATION", XUSBXTI_DURATION, 0xFFF00000},
-    {"XXTI_CONFIGURATION", XXTI_CONFIGURATION, 0x00000001},
-    {"XXTI_STATUS", XXTI_STATUS, 0x00000001},
-    {"XXTI_DURATION", XXTI_DURATION, 0xFFF00000},
-    {"EXT_REGULATOR_DURATION", EXT_REGULATOR_DURATION, 0xFFF03FFF},
-    {"CAM_CONFIGURATION", CAM_CONFIGURATION, 0x00000007},
-    {"CAM_STATUS", CAM_STATUS, 0x00060007},
-    {"CAM_OPTION", CAM_OPTION, 0x00000001},
-    {"TV_CONFIGURATION", TV_CONFIGURATION, 0x00000007},
-    {"TV_STATUS", TV_STATUS, 0x00060007},
-    {"TV_OPTION", TV_OPTION, 0x00000001},
-    {"MFC_CONFIGURATION", MFC_CONFIGURATION, 0x00000007},
-    {"MFC_STATUS", MFC_STATUS, 0x00060007},
-    {"MFC_OPTION", MFC_OPTION, 0x00000001},
-    {"G3D_CONFIGURATION", G3D_CONFIGURATION, 0x00000007},
-    {"G3D_STATUS", G3D_STATUS, 0x00060007},
-    {"G3D_OPTION", G3D_OPTION, 0x00000001},
-    {"LCD0_CONFIGURATION", LCD0_CONFIGURATION, 0x00000007},
-    {"LCD0_STATUS", LCD0_STATUS, 0x00060007},
-    {"LCD0_OPTION", LCD0_OPTION, 0x00000001},
-    {"LCD1_CONFIGURATION", LCD1_CONFIGURATION, 0x00000007},
-    {"LCD1_STATUS", LCD1_STATUS, 0x00060007},
-    {"LCD1_OPTION", LCD1_OPTION, 0x00000001},
-    {"GPS_CONFIGURATION", GPS_CONFIGURATION, 0x00000007},
-    {"GPS_STATUS", GPS_STATUS, 0x00060007},
-    {"GPS_OPTION", GPS_OPTION, 0x00000001},
-    {"GPS_ALIVE_CONFIGURATION", GPS_ALIVE_CONFIGURATION, 0x00000007},
-    {"GPS_ALIVE_STATUS", GPS_ALIVE_STATUS, 0x00060007},
-    {"GPS_ALIVE_OPTION", GPS_ALIVE_OPTION, 0x00000001},
+    { "OM_STAT",                      OM_STAT,                     0x00000000 },
+    { "RTC_CLKO_SEL",                 RTC_CLKO_SEL,                0x00000000 },
+    { "GNSS_RTC_OUT_CTRL",            GNSS_RTC_OUT_CTRL,           0x00000001 },
+    { "SYSTEM_POWER_DOWN_CTRL",       SYSTEM_POWER_DOWN_CTRL,      0x00010000 },
+    { "SYSTEM_POWER_DOWN_OPTION",     SYSTEM_POWER_DOWN_OPTION,    0x03030000 },
+    { "SWRESET",                      SWRESET,                     0x00000000 },
+    { "RST_STAT",                     RST_STAT,                    0x00000000 },
+    { "WAKEUP_STAT",                  WAKEUP_STAT,                 0x00000000 },
+    { "EINT_WAKEUP_MASK",             EINT_WAKEUP_MASK,            0x00000000 },
+    { "WAKEUP_MASK",                  WAKEUP_MASK,                 0x00000000 },
+    { "HDMI_PHY_CONTROL",             HDMI_PHY_CONTROL,            0x00960000 },
+    { "USBDEVICE_PHY_CONTROL",        USBDEVICE_PHY_CONTROL,       0x00000000 },
+    { "USBHOST_PHY_CONTROL",          USBHOST_PHY_CONTROL,         0x00000000 },
+    { "DAC_PHY_CONTROL",              DAC_PHY_CONTROL,             0x00000000 },
+    { "MIPI_PHY0_CONTROL",            MIPI_PHY0_CONTROL,           0x00000000 },
+    { "MIPI_PHY1_CONTROL",            MIPI_PHY1_CONTROL,           0x00000000 },
+    { "ADC_PHY_CONTROL",              ADC_PHY_CONTROL,             0x00000001 },
+    { "PCIe_PHY_CONTROL",             PCIe_PHY_CONTROL,            0x00000000 },
+    { "SATA_PHY_CONTROL",             SATA_PHY_CONTROL,            0x00000000 },
+    { "INFORM0",                      INFORM0,                     0x00000000 },
+    { "INFORM1",                      INFORM1,                     0x00000000 },
+    { "INFORM2",                      INFORM2,                     0x00000000 },
+    { "INFORM3",                      INFORM3,                     0x00000000 },
+    { "INFORM4",                      INFORM4,                     0x00000000 },
+    { "INFORM5",                      INFORM5,                     0x00000000 },
+    { "INFORM6",                      INFORM6,                     0x00000000 },
+    { "INFORM7",                      INFORM7,                     0x00000000 },
+    { "PMU_DEBUG",                    PMU_DEBUG,                   0x00000000 },
+    { "ARM_CORE0_SYS_PWR_REG",        ARM_CORE0_SYS_PWR_REG,       0xFFFFFFFF },
+    { "ARM_CORE1_SYS_PWR_REG",        ARM_CORE1_SYS_PWR_REG,       0xFFFFFFFF },
+    { "ARM_COMMON_SYS_PWR_REG",       ARM_COMMON_SYS_PWR_REG,      0xFFFFFFFF },
+    { "ARM_CPU_L2_0_SYS_PWR_REG",     ARM_CPU_L2_0_SYS_PWR_REG,    0xFFFFFFFF },
+    { "ARM_CPU_L2_1_SYS_PWR_REG",     ARM_CPU_L2_1_SYS_PWR_REG,    0xFFFFFFFF },
+    { "CMU_ACLKSTOP_SYS_PWR_REG",     CMU_ACLKSTOP_SYS_PWR_REG,    0xFFFFFFFF },
+    { "CMU_SCLKSTOP_SYS_PWR_REG",     CMU_SCLKSTOP_SYS_PWR_REG,    0xFFFFFFFF },
+    { "CMU_RESET_SYS_PWR_REG",        CMU_RESET_SYS_PWR_REG,       0xFFFFFFFF },
+    { "APLL_SYSCLK_SYS_PWR_REG",      APLL_SYSCLK_SYS_PWR_REG,     0xFFFFFFFF },
+    { "MPLL_SYSCLK_SYS_PWR_REG",      MPLL_SYSCLK_SYS_PWR_REG,     0xFFFFFFFF },
+    { "VPLL_SYSCLK_SYS_PWR_REG",      VPLL_SYSCLK_SYS_PWR_REG,     0xFFFFFFFF },
+    { "EPLL_SYSCLK_SYS_PWR_REG",      EPLL_SYSCLK_SYS_PWR_REG,     0xFFFFFFFF },
+    { "CMU_CLKSTOP_GPS_ALIVE_SYS_PWR_REG", CMU_CLKSTOP_GPS_ALIVE_SYS_PWR_REG,
+                                                                   0xFFFFFFFF },
+    { "CMU_RESET_GPS_ALIVE_SYS_PWR_REG", CMU_RESET_GPS_ALIVE_SYS_PWR_REG,
+                                                                   0xFFFFFFFF },
+    { "CMU_CLKSTOP_CAM_SYS_PWR_REG",  CMU_CLKSTOP_CAM_SYS_PWR_REG, 0xFFFFFFFF },
+    { "CMU_CLKSTOP_TV_SYS_PWR_REG",   CMU_CLKSTOP_TV_SYS_PWR_REG,  0xFFFFFFFF },
+    { "CMU_CLKSTOP_MFC_SYS_PWR_REG",  CMU_CLKSTOP_MFC_SYS_PWR_REG, 0xFFFFFFFF },
+    { "CMU_CLKSTOP_G3D_SYS_PWR_REG",  CMU_CLKSTOP_G3D_SYS_PWR_REG, 0xFFFFFFFF },
+    { "CMU_CLKSTOP_LCD0_SYS_PWR_REG", CMU_CLKSTOP_LCD0_SYS_PWR_REG,
+                                                                   0xFFFFFFFF },
+    { "CMU_CLKSTOP_LCD1_SYS_PWR_REG", CMU_CLKSTOP_LCD1_SYS_PWR_REG,
+                                                                   0xFFFFFFFF },
+    { "CMU_CLKSTOP_MAUDIO_SYS_PWR_REG", CMU_CLKSTOP_MAUDIO_SYS_PWR_REG,
+                                                                   0xFFFFFFFF },
+    { "CMU_CLKSTOP_GPS_SYS_PWR_REG",  CMU_CLKSTOP_GPS_SYS_PWR_REG, 0xFFFFFFFF },
+    { "CMU_RESET_CAM_SYS_PWR_REG",    CMU_RESET_CAM_SYS_PWR_REG,   0xFFFFFFFF },
+    { "CMU_RESET_TV_SYS_PWR_REG",     CMU_RESET_TV_SYS_PWR_REG,    0xFFFFFFFF },
+    { "CMU_RESET_MFC_SYS_PWR_REG",    CMU_RESET_MFC_SYS_PWR_REG,   0xFFFFFFFF },
+    { "CMU_RESET_G3D_SYS_PWR_REG",    CMU_RESET_G3D_SYS_PWR_REG,   0xFFFFFFFF },
+    { "CMU_RESET_LCD0_SYS_PWR_REG",   CMU_RESET_LCD0_SYS_PWR_REG,  0xFFFFFFFF },
+    { "CMU_RESET_LCD1_SYS_PWR_REG",   CMU_RESET_LCD1_SYS_PWR_REG,  0xFFFFFFFF },
+    { "CMU_RESET_MAUDIO_SYS_PWR_REG", CMU_RESET_MAUDIO_SYS_PWR_REG,
+                                                                   0xFFFFFFFF },
+    { "CMU_RESET_GPS_SYS_PWR_REG",    CMU_RESET_GPS_SYS_PWR_REG,   0xFFFFFFFF },
+    { "TOP_BUS_SYS_PWR_REG",          TOP_BUS_SYS_PWR_REG,         0xFFFFFFFF },
+    { "TOP_RETENTION_SYS_PWR_REG",    TOP_RETENTION_SYS_PWR_REG,   0xFFFFFFFF },
+    { "TOP_PWR_SYS_PWR_REG",          TOP_PWR_SYS_PWR_REG,         0xFFFFFFFF },
+    { "LOGIC_RESET_SYS_PWR_REG",      LOGIC_RESET_SYS_PWR_REG,     0xFFFFFFFF },
+    { "OneNANDXL_MEM_SYS_PWR_REG",    OneNANDXL_MEM_SYS_PWR_REG,   0xFFFFFFFF },
+    { "MODEMIF_MEM_SYS_PWR_REG",      MODEMIF_MEM_SYS_PWR_REG,     0xFFFFFFFF },
+    { "USBDEVICE_MEM_SYS_PWR_REG",    USBDEVICE_MEM_SYS_PWR_REG,   0xFFFFFFFF },
+    { "SDMMC_MEM_SYS_PWR_REG",        SDMMC_MEM_SYS_PWR_REG,       0xFFFFFFFF },
+    { "CSSYS_MEM_SYS_PWR_REG",        CSSYS_MEM_SYS_PWR_REG,       0xFFFFFFFF },
+    { "SECSS_MEM_SYS_PWR_REG",        SECSS_MEM_SYS_PWR_REG,       0xFFFFFFFF },
+    { "PCIe_MEM_SYS_PWR_REG",         PCIe_MEM_SYS_PWR_REG,        0xFFFFFFFF },
+    { "SATA_MEM_SYS_PWR_REG",         SATA_MEM_SYS_PWR_REG,        0xFFFFFFFF },
+    { "PAD_RETENTION_DRAM_SYS_PWR_REG", PAD_RETENTION_DRAM_SYS_PWR_REG,
+                                                                   0xFFFFFFFF },
+    { "PAD_RETENTION_MAUDIO_SYS_PWR_REG", PAD_RETENTION_MAUDIO_SYS_PWR_REG,
+                                                                   0xFFFFFFFF },
+    { "PAD_RETENTION_GPIO_SYS_PWR_REG", PAD_RETENTION_GPIO_SYS_PWR_REG,
+                                                                   0xFFFFFFFF },
+    { "PAD_RETENTION_UART_SYS_PWR_REG", PAD_RETENTION_UART_SYS_PWR_REG,
+                                                                   0xFFFFFFFF },
+    { "PAD_RETENTION_MMCA_SYS_PWR_REG", PAD_RETENTION_MMCA_SYS_PWR_REG,
+                                                                   0xFFFFFFFF },
+    { "PAD_RETENTION_MMCB_SYS_PWR_REG", PAD_RETENTION_MMCB_SYS_PWR_REG,
+                                                                   0xFFFFFFFF },
+    { "PAD_RETENTION_EBIA_SYS_PWR_REG", PAD_RETENTION_EBIA_SYS_PWR_REG,
+                                                                   0xFFFFFFFF },
+    { "PAD_RETENTION_EBIB_SYS_PWR_REG", PAD_RETENTION_EBIB_SYS_PWR_REG,
+                                                                   0xFFFFFFFF },
+    { "PAD_ISOLATION_SYS_PWR_REG",    PAD_ISOLATION_SYS_PWR_REG,   0xFFFFFFFF },
+    { "PAD_ALV_SEL_SYS_PWR_REG",      PAD_ALV_SEL_SYS_PWR_REG,     0xFFFFFFFF },
+    { "XUSBXTI_SYS_PWR_REG",          XUSBXTI_SYS_PWR_REG,         0xFFFFFFFF },
+    { "XXTI_SYS_PWR_REG",             XXTI_SYS_PWR_REG,            0xFFFFFFFF },
+    { "EXT_REGULATOR_SYS_PWR_REG",    EXT_REGULATOR_SYS_PWR_REG,   0xFFFFFFFF },
+    { "GPIO_MODE_SYS_PWR_REG",        GPIO_MODE_SYS_PWR_REG,       0xFFFFFFFF },
+    { "GPIO_MODE_MAUDIO_SYS_PWR_REG", GPIO_MODE_MAUDIO_SYS_PWR_REG,
+                                                                   0xFFFFFFFF },
+    { "CAM_SYS_PWR_REG",              CAM_SYS_PWR_REG,             0xFFFFFFFF },
+    { "TV_SYS_PWR_REG",               TV_SYS_PWR_REG,              0xFFFFFFFF },
+    { "MFC_SYS_PWR_REG",              MFC_SYS_PWR_REG,             0xFFFFFFFF },
+    { "G3D_SYS_PWR_REG",              G3D_SYS_PWR_REG,             0xFFFFFFFF },
+    { "LCD0_SYS_PWR_REG",             LCD0_SYS_PWR_REG,            0xFFFFFFFF },
+    { "LCD1_SYS_PWR_REG",             LCD1_SYS_PWR_REG,            0xFFFFFFFF },
+    { "MAUDIO_SYS_PWR_REG",           MAUDIO_SYS_PWR_REG,          0xFFFFFFFF },
+    { "GPS_SYS_PWR_REG",              GPS_SYS_PWR_REG,             0xFFFFFFFF },
+    { "GPS_ALIVE_SYS_PWR_REG",        GPS_ALIVE_SYS_PWR_REG,       0xFFFFFFFF },
+    { "ARM_CORE0_CONFIGURATION",      ARM_CORE0_CONFIGURATION,     0x00000003 },
+    { "ARM_CORE0_STATUS",             ARM_CORE0_STATUS,            0x00030003 },
+    { "ARM_CORE0_OPTION",             ARM_CORE0_OPTION,            0x01010001 },
+    { "ARM_CORE1_CONFIGURATION",      ARM_CORE1_CONFIGURATION,     0x00000003 },
+    { "ARM_CORE1_STATUS",             ARM_CORE1_STATUS,            0x00030003 },
+    { "ARM_CORE1_OPTION",             ARM_CORE1_OPTION,            0x01010001 },
+    { "ARM_COMMON_OPTION",            ARM_COMMON_OPTION,           0x00000001 },
+    { "ARM_CPU_L2_0_CONFIGURATION",   ARM_CPU_L2_0_CONFIGURATION,  0x00000003 },
+    { "ARM_CPU_L2_0_STATUS",          ARM_CPU_L2_0_STATUS,         0x00000003 },
+    { "ARM_CPU_L2_1_CONFIGURATION",   ARM_CPU_L2_1_CONFIGURATION,  0x00000003 },
+    { "ARM_CPU_L2_1_STATUS",          ARM_CPU_L2_1_STATUS,         0x00000003 },
+    { "PAD_RETENTION_MAUDIO_OPTION",  PAD_RETENTION_MAUDIO_OPTION, 0x00000000 },
+    { "PAD_RETENTION_GPIO_OPTION",    PAD_RETENTION_GPIO_OPTION,   0x00000000 },
+    { "PAD_RETENTION_UART_OPTION",    PAD_RETENTION_UART_OPTION,   0x00000000 },
+    { "PAD_RETENTION_MMCA_OPTION",    PAD_RETENTION_MMCA_OPTION,   0x00000000 },
+    { "PAD_RETENTION_MMCB_OPTION",    PAD_RETENTION_MMCB_OPTION,   0x00000000 },
+    { "PAD_RETENTION_EBIA_OPTION",    PAD_RETENTION_EBIA_OPTION,   0x00000000 },
+    { "PAD_RETENTION_EBIB_OPTION",    PAD_RETENTION_EBIB_OPTION,   0x00000000 },
+    { "PS_HOLD_CONTROL",              PS_HOLD_CONTROL,             0x00005200 },
+    { "XUSBXTI_CONFIGURATION",        XUSBXTI_CONFIGURATION,       0x00000001 },
+    { "XUSBXTI_STATUS",               XUSBXTI_STATUS,              0x00000001 },
+    { "XUSBXTI_DURATION",             XUSBXTI_DURATION,            0xFFF00000 },
+    { "XXTI_CONFIGURATION",           XXTI_CONFIGURATION,          0x00000001 },
+    { "XXTI_STATUS",                  XXTI_STATUS,                 0x00000001 },
+    { "XXTI_DURATION",                XXTI_DURATION,               0xFFF00000 },
+    { "EXT_REGULATOR_DURATION",       EXT_REGULATOR_DURATION,      0xFFF03FFF },
+    { "CAM_CONFIGURATION",            CAM_CONFIGURATION,           0x00000007 },
+    { "CAM_STATUS",                   CAM_STATUS,                  0x00060007 },
+    { "CAM_OPTION",                   CAM_OPTION,                  0x00000001 },
+    { "TV_CONFIGURATION",             TV_CONFIGURATION,            0x00000007 },
+    { "TV_STATUS",                    TV_STATUS,                   0x00060007 },
+    { "TV_OPTION",                    TV_OPTION,                   0x00000001 },
+    { "MFC_CONFIGURATION",            MFC_CONFIGURATION,           0x00000007 },
+    { "MFC_STATUS",                   MFC_STATUS,                  0x00060007 },
+    { "MFC_OPTION",                   MFC_OPTION,                  0x00000001 },
+    { "G3D_CONFIGURATION",            G3D_CONFIGURATION,           0x00000007 },
+    { "G3D_STATUS",                   G3D_STATUS,                  0x00060007 },
+    { "G3D_OPTION",                   G3D_OPTION,                  0x00000001 },
+    { "LCD0_CONFIGURATION",           LCD0_CONFIGURATION,          0x00000007 },
+    { "LCD0_STATUS",                  LCD0_STATUS,                 0x00060007 },
+    { "LCD0_OPTION",                  LCD0_OPTION,                 0x00000001 },
+    { "LCD1_CONFIGURATION",           LCD1_CONFIGURATION,          0x00000007 },
+    { "LCD1_STATUS",                  LCD1_STATUS,                 0x00060007 },
+    { "LCD1_OPTION",                  LCD1_OPTION,                 0x00000001 },
+    { "GPS_CONFIGURATION",            GPS_CONFIGURATION,           0x00000007 },
+    { "GPS_STATUS",                   GPS_STATUS,                  0x00060007 },
+    { "GPS_OPTION",                   GPS_OPTION,                  0x00000001 },
+    { "GPS_ALIVE_CONFIGURATION",      GPS_ALIVE_CONFIGURATION,     0x00000007 },
+    { "GPS_ALIVE_STATUS",             GPS_ALIVE_STATUS,            0x00060007 },
+    { "GPS_ALIVE_OPTION",             GPS_ALIVE_OPTION,            0x00000001 },
 };
 
-#define PMU_NUM_OF_REGISTERS     \
+#define PMU_NUM_OF_REGISTERS \
     (sizeof(exynos4210_pmu_regs) / sizeof(Exynos4210PmuReg))
 
 typedef struct Exynos4210PmuState {
     SysBusDevice busdev;
     MemoryRegion iomem;
-    uint32_t reg[PMU_NUM_OF_REGISTERS];
+    uint32_t     reg[PMU_NUM_OF_REGISTERS];
 } Exynos4210PmuState;
 
 static uint64_t exynos4210_pmu_read(void *opaque, target_phys_addr_t offset,
@@ -468,7 +472,7 @@ static const VMStateDescription exynos4210_pmu_vmstate = {
     .name = "exynos4210.pmu",
     .version_id = 1,
     .minimum_version_id = 1,
-    .fields      = (VMStateField[]) {
+    .fields = (VMStateField[]) {
         VMSTATE_UINT32_ARRAY(reg, Exynos4210PmuState, PMU_NUM_OF_REGISTERS),
         VMSTATE_END_OF_LIST()
     }
@@ -479,9 +483,9 @@ static void exynos4210_pmu_class_init(ObjectClass *klass, void *data)
     DeviceClass *dc = DEVICE_CLASS(klass);
     SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
 
-    k->init = exynos4210_pmu_init;
+    k->init   = exynos4210_pmu_init;
     dc->reset = exynos4210_pmu_reset;
-    dc->vmsd = &exynos4210_pmu_vmstate;
+    dc->vmsd  = &exynos4210_pmu_vmstate;
 }
 
 static TypeInfo exynos4210_pmu_info = {
