From patchwork Thu Jun 7 09:30:55 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gerd Hoffmann X-Patchwork-Id: 163616 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id E7F2AB7000 for ; Thu, 7 Jun 2012 21:32:26 +1000 (EST) Received: from localhost ([::1]:56272 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ScZ56-0001tA-Bo for incoming@patchwork.ozlabs.org; Thu, 07 Jun 2012 05:32:40 -0400 Received: from eggs.gnu.org ([208.118.235.92]:39152) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ScZ48-0000Qy-Dz for qemu-devel@nongnu.org; Thu, 07 Jun 2012 05:31:51 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ScZ3z-0004EQ-2s for qemu-devel@nongnu.org; Thu, 07 Jun 2012 05:31:40 -0400 Received: from mx1.redhat.com ([209.132.183.28]:5900) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ScZ3y-0004D6-Qi for qemu-devel@nongnu.org; Thu, 07 Jun 2012 05:31:30 -0400 Received: from int-mx11.intmail.prod.int.phx2.redhat.com (int-mx11.intmail.prod.int.phx2.redhat.com [10.5.11.24]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id q579VTou031683 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK) for ; Thu, 7 Jun 2012 05:31:29 -0400 Received: from rincewind.home.kraxel.org (ovpn-116-45.ams2.redhat.com [10.36.116.45]) by int-mx11.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id q579VSP4023682; Thu, 7 Jun 2012 05:31:28 -0400 Received: by rincewind.home.kraxel.org (Postfix, from userid 500) id 1918241C7A; Thu, 7 Jun 2012 11:31:26 +0200 (CEST) From: Gerd Hoffmann To: qemu-devel@nongnu.org Date: Thu, 7 Jun 2012 11:30:55 +0200 Message-Id: <1339061486-28513-7-git-send-email-kraxel@redhat.com> In-Reply-To: <1339061486-28513-1-git-send-email-kraxel@redhat.com> References: <1339061486-28513-1-git-send-email-kraxel@redhat.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.24 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 209.132.183.28 Cc: Gerd Hoffmann Subject: [Qemu-devel] [PATCH 06/37] uhci: fix irq routing X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org The multifunction ich9 ehci controller with uhci companions uses a different interrupt pin for each function. The three uhci devices get pins A, B and C, whereas ehci uses pin D. This way the guest can assign different IRQ lines to each controller. Signed-off-by: Gerd Hoffmann --- hw/usb/hcd-uhci.c | 21 +++++++++++++++++++-- 1 files changed, 19 insertions(+), 2 deletions(-) diff --git a/hw/usb/hcd-uhci.c b/hw/usb/hcd-uhci.c index 3ea388c..9871e24 100644 --- a/hw/usb/hcd-uhci.c +++ b/hw/usb/hcd-uhci.c @@ -138,6 +138,7 @@ struct UHCIState { /* Interrupts that should be raised at the end of the current frame. */ uint32_t pending_int_mask; + int irq_pin; /* Active packets */ QTAILQ_HEAD(, UHCIQueue) queues; @@ -340,7 +341,7 @@ static void uhci_update_irq(UHCIState *s) } else { level = 0; } - qemu_set_irq(s->dev.irq[3], level); + qemu_set_irq(s->dev.irq[s->irq_pin], level); } static void uhci_reset(void *opaque) @@ -1184,15 +1185,31 @@ static USBBusOps uhci_bus_ops = { static int usb_uhci_common_initfn(PCIDevice *dev) { + PCIDeviceClass *pc = PCI_DEVICE_GET_CLASS(dev); UHCIState *s = DO_UPCAST(UHCIState, dev, dev); uint8_t *pci_conf = s->dev.config; int i; pci_conf[PCI_CLASS_PROG] = 0x00; /* TODO: reset value should be 0. */ - pci_conf[PCI_INTERRUPT_PIN] = 4; /* interrupt pin D */ pci_conf[USB_SBRN] = USB_RELEASE_1; // release number + switch (pc->device_id) { + case PCI_DEVICE_ID_INTEL_82801I_UHCI1: + s->irq_pin = 0; /* A */ + break; + case PCI_DEVICE_ID_INTEL_82801I_UHCI2: + s->irq_pin = 1; /* B */ + break; + case PCI_DEVICE_ID_INTEL_82801I_UHCI3: + s->irq_pin = 2; /* C */ + break; + default: + s->irq_pin = 3; /* D */ + break; + } + pci_config_set_interrupt_pin(pci_conf, s->irq_pin + 1); + if (s->masterbus) { USBPort *ports[NB_PORTS]; for(i = 0; i < NB_PORTS; i++) {