From patchwork Wed May 30 14:23:34 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 162008 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 4C67FB704F for ; Thu, 31 May 2012 01:18:46 +1000 (EST) Received: from localhost ([::1]:38250 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SZjqy-0008JA-1R for incoming@patchwork.ozlabs.org; Wed, 30 May 2012 10:26:24 -0400 Received: from eggs.gnu.org ([208.118.235.92]:51936) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SZjox-0004hi-DU for qemu-devel@nongnu.org; Wed, 30 May 2012 10:24:26 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1SZjok-0003lD-EM for qemu-devel@nongnu.org; Wed, 30 May 2012 10:24:18 -0400 Received: from cantor2.suse.de ([195.135.220.15]:45868 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SZjok-0003kW-09; Wed, 30 May 2012 10:24:06 -0400 Received: from relay1.suse.de (unknown [195.135.220.254]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mx2.suse.de (Postfix) with ESMTP id A56D99141C; Wed, 30 May 2012 16:24:04 +0200 (CEST) From: =?UTF-8?q?Andreas=20F=C3=A4rber?= To: qemu-devel@nongnu.org Date: Wed, 30 May 2012 16:23:34 +0200 Message-Id: <1338387823-12861-15-git-send-email-afaerber@suse.de> X-Mailer: git-send-email 1.7.7 In-Reply-To: <1338387823-12861-1-git-send-email-afaerber@suse.de> References: <1338387823-12861-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.4-2.6 X-Received-From: 195.135.220.15 Cc: blauwirbel@gmail.com, qemu-ppc@nongnu.org, agraf@suse.de, =?UTF-8?q?Andreas=20F=C3=A4rber?= Subject: [Qemu-devel] [PATCH v4 14/23] ppc: Cleanup MMU merge X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Blue Swirl Remove useless wrappers. In some cases 'int' parameters are changed to uint32_t. Make internal functions static. Signed-off-by: Blue Swirl [agraf: fix kvm compilation] Signed-off-by: Alexander Graf Signed-off-by: Andreas Färber --- target-ppc/cpu.h | 21 -------- target-ppc/mmu_helper.c | 120 ++++++++++++++--------------------------------- 2 files changed, 35 insertions(+), 106 deletions(-) diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index 32cfcef..9b157f0 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -1118,24 +1118,11 @@ void do_interrupt (CPUPPCState *env); void ppc_hw_interrupt (CPUPPCState *env); #if !defined(CONFIG_USER_ONLY) -void ppc6xx_tlb_store (CPUPPCState *env, target_ulong EPN, int way, int is_code, - target_ulong pte0, target_ulong pte1); -void ppc_store_ibatu (CPUPPCState *env, int nr, target_ulong value); -void ppc_store_ibatl (CPUPPCState *env, int nr, target_ulong value); -void ppc_store_dbatu (CPUPPCState *env, int nr, target_ulong value); -void ppc_store_dbatl (CPUPPCState *env, int nr, target_ulong value); -void ppc_store_ibatu_601 (CPUPPCState *env, int nr, target_ulong value); -void ppc_store_ibatl_601 (CPUPPCState *env, int nr, target_ulong value); void ppc_store_sdr1 (CPUPPCState *env, target_ulong value); #if defined(TARGET_PPC64) void ppc_store_asr (CPUPPCState *env, target_ulong value); -target_ulong ppc_load_slb (CPUPPCState *env, int slb_nr); -target_ulong ppc_load_sr (CPUPPCState *env, int sr_nr); int ppc_store_slb (CPUPPCState *env, target_ulong rb, target_ulong rs); -int ppc_load_slb_esid (CPUPPCState *env, target_ulong rb, target_ulong *rt); -int ppc_load_slb_vsid (CPUPPCState *env, target_ulong rb, target_ulong *rt); #endif /* defined(TARGET_PPC64) */ -void ppc_store_sr (CPUPPCState *env, int srnum, target_ulong value); #endif /* !defined(CONFIG_USER_ONLY) */ void ppc_store_msr (CPUPPCState *env, target_ulong value); @@ -1174,19 +1161,11 @@ void store_booke_tcr (CPUPPCState *env, target_ulong val); void store_booke_tsr (CPUPPCState *env, target_ulong val); void booke206_flush_tlb(CPUPPCState *env, int flags, const int check_iprot); target_phys_addr_t booke206_tlb_to_page_size(CPUPPCState *env, ppcmas_tlb_t *tlb); -int ppcemb_tlb_check(CPUPPCState *env, ppcemb_tlb_t *tlb, - target_phys_addr_t *raddrp, target_ulong address, - uint32_t pid, int ext, int i); int ppcmas_tlb_check(CPUPPCState *env, ppcmas_tlb_t *tlb, target_phys_addr_t *raddrp, target_ulong address, uint32_t pid); void ppc_tlb_invalidate_all (CPUPPCState *env); void ppc_tlb_invalidate_one (CPUPPCState *env, target_ulong addr); -#if defined(TARGET_PPC64) -void ppc_slb_invalidate_all (CPUPPCState *env); -void ppc_slb_invalidate_one (CPUPPCState *env, uint64_t T0); -#endif -int ppcemb_tlb_search (CPUPPCState *env, target_ulong address, uint32_t pid); #endif #endif diff --git a/target-ppc/mmu_helper.c b/target-ppc/mmu_helper.c index b703ea4..dfbd759 100644 --- a/target-ppc/mmu_helper.c +++ b/target-ppc/mmu_helper.c @@ -347,8 +347,8 @@ static inline void ppc6xx_tlb_invalidate_virt(CPUPPCState *env, ppc6xx_tlb_invalidate_virt2(env, eaddr, is_code, 0); } -void ppc6xx_tlb_store(CPUPPCState *env, target_ulong EPN, int way, int is_code, - target_ulong pte0, target_ulong pte1) +static void ppc6xx_tlb_store(CPUPPCState *env, target_ulong EPN, int way, + int is_code, target_ulong pte0, target_ulong pte1) { ppc6xx_tlb_t *tlb; int nr; @@ -712,7 +712,10 @@ static inline ppc_slb_t *slb_lookup(CPUPPCState *env, target_ulong eaddr) return NULL; } -void ppc_slb_invalidate_all(CPUPPCState *env) +/*****************************************************************************/ +/* SPR accesses */ + +void helper_slbia(CPUPPCState *env) { int n, do_invalidate; @@ -735,11 +738,11 @@ void ppc_slb_invalidate_all(CPUPPCState *env) } } -void ppc_slb_invalidate_one(CPUPPCState *env, uint64_t T0) +void helper_slbie(CPUPPCState *env, target_ulong addr) { ppc_slb_t *slb; - slb = slb_lookup(env, T0); + slb = slb_lookup(env, addr); if (!slb) { return; } @@ -781,7 +784,8 @@ int ppc_store_slb(CPUPPCState *env, target_ulong rb, target_ulong rs) return 0; } -int ppc_load_slb_esid(CPUPPCState *env, target_ulong rb, target_ulong *rt) +static int ppc_load_slb_esid(CPUPPCState *env, target_ulong rb, + target_ulong *rt) { int slot = rb & 0xfff; ppc_slb_t *slb = &env->slb[slot]; @@ -794,7 +798,8 @@ int ppc_load_slb_esid(CPUPPCState *env, target_ulong rb, target_ulong *rt) return 0; } -int ppc_load_slb_vsid(CPUPPCState *env, target_ulong rb, target_ulong *rt) +static int ppc_load_slb_vsid(CPUPPCState *env, target_ulong rb, + target_ulong *rt) { int slot = rb & 0xfff; ppc_slb_t *slb = &env->slb[slot]; @@ -1003,10 +1008,10 @@ static inline int get_segment(CPUPPCState *env, mmu_ctx_t *ctx, } /* Generic TLB check function for embedded PowerPC implementations */ -int ppcemb_tlb_check(CPUPPCState *env, ppcemb_tlb_t *tlb, - target_phys_addr_t *raddrp, - target_ulong address, uint32_t pid, int ext, - int i) +static int ppcemb_tlb_check(CPUPPCState *env, ppcemb_tlb_t *tlb, + target_phys_addr_t *raddrp, + target_ulong address, uint32_t pid, int ext, + int i) { target_ulong mask; @@ -1038,7 +1043,8 @@ int ppcemb_tlb_check(CPUPPCState *env, ppcemb_tlb_t *tlb, } /* Generic TLB search function for PowerPC embedded implementations */ -int ppcemb_tlb_search(CPUPPCState *env, target_ulong address, uint32_t pid) +static int ppcemb_tlb_search(CPUPPCState *env, target_ulong address, + uint32_t pid) { ppcemb_tlb_t *tlb; target_phys_addr_t raddr; @@ -2094,7 +2100,7 @@ static inline void dump_store_bat(CPUPPCState *env, char ID, int ul, int nr, nr, ul == 0 ? 'u' : 'l', value, env->nip); } -void ppc_store_ibatu(CPUPPCState *env, int nr, target_ulong value) +void helper_store_ibatu(CPUPPCState *env, uint32_t nr, target_ulong value) { target_ulong mask; @@ -2120,13 +2126,13 @@ void ppc_store_ibatu(CPUPPCState *env, int nr, target_ulong value) } } -void ppc_store_ibatl(CPUPPCState *env, int nr, target_ulong value) +void helper_store_ibatl(CPUPPCState *env, uint32_t nr, target_ulong value) { dump_store_bat(env, 'I', 1, nr, value); env->IBAT[1][nr] = value; } -void ppc_store_dbatu(CPUPPCState *env, int nr, target_ulong value) +void helper_store_dbatu(CPUPPCState *env, uint32_t nr, target_ulong value) { target_ulong mask; @@ -2152,13 +2158,13 @@ void ppc_store_dbatu(CPUPPCState *env, int nr, target_ulong value) } } -void ppc_store_dbatl(CPUPPCState *env, int nr, target_ulong value) +void helper_store_dbatl(CPUPPCState *env, uint32_t nr, target_ulong value) { dump_store_bat(env, 'D', 1, nr, value); env->DBAT[1][nr] = value; } -void ppc_store_ibatu_601(CPUPPCState *env, int nr, target_ulong value) +void helper_store_601_batu(CPUPPCState *env, uint32_t nr, target_ulong value) { target_ulong mask; #if defined(FLUSH_ALL_TLBS) @@ -2200,7 +2206,7 @@ void ppc_store_ibatu_601(CPUPPCState *env, int nr, target_ulong value) } } -void ppc_store_ibatl_601(CPUPPCState *env, int nr, target_ulong value) +void helper_store_601_batl(CPUPPCState *env, uint32_t nr, target_ulong value) { target_ulong mask; #if defined(FLUSH_ALL_TLBS) @@ -2396,18 +2402,22 @@ void ppc_store_sdr1(CPUPPCState *env, target_ulong value) } } -#if defined(TARGET_PPC64) -target_ulong ppc_load_sr(CPUPPCState *env, int slb_nr) +/* Segment registers load and store */ +target_ulong helper_load_sr(CPUPPCState *env, target_ulong sr_num) { - /* XXX */ - return 0; -} +#if defined(TARGET_PPC64) + if (env->mmu_model & POWERPC_MMU_64) { + /* XXX */ + return 0; + } #endif + return env->sr[sr_num]; +} -void ppc_store_sr(CPUPPCState *env, int srnum, target_ulong value) +void helper_store_sr(CPUPPCState *env, target_ulong srnum, target_ulong value) { LOG_MMU("%s: reg=%d " TARGET_FMT_lx " " TARGET_FMT_lx "\n", __func__, - srnum, value, env->sr[srnum]); + (int)srnum, value, env->sr[srnum]); #if defined(TARGET_PPC64) if (env->mmu_model & POWERPC_MMU_64) { uint64_t rb = 0, rs = 0; @@ -2448,56 +2458,7 @@ void ppc_store_sr(CPUPPCState *env, int srnum, target_ulong value) } #endif /* !defined(CONFIG_USER_ONLY) */ -/*****************************************************************************/ -/* SPR accesses */ - #if !defined(CONFIG_USER_ONLY) -void helper_store_ibatu(CPUPPCState *env, uint32_t nr, target_ulong val) -{ - ppc_store_ibatu(env, nr, val); -} - -void helper_store_ibatl(CPUPPCState *env, uint32_t nr, target_ulong val) -{ - ppc_store_ibatl(env, nr, val); -} - -void helper_store_dbatu(CPUPPCState *env, uint32_t nr, target_ulong val) -{ - ppc_store_dbatu(env, nr, val); -} - -void helper_store_dbatl(CPUPPCState *env, uint32_t nr, target_ulong val) -{ - ppc_store_dbatl(env, nr, val); -} - -void helper_store_601_batl(CPUPPCState *env, uint32_t nr, target_ulong val) -{ - ppc_store_ibatl_601(env, nr, val); -} - -void helper_store_601_batu(CPUPPCState *env, uint32_t nr, target_ulong val) -{ - ppc_store_ibatu_601(env, nr, val); -} - -/* Segment registers load and store */ -target_ulong helper_load_sr(CPUPPCState *env, target_ulong sr_num) -{ -#if defined(TARGET_PPC64) - if (env->mmu_model & POWERPC_MMU_64) { - return ppc_load_sr(env, sr_num); - } -#endif - return env->sr[sr_num]; -} - -void helper_store_sr(CPUPPCState *env, target_ulong sr_num, target_ulong val) -{ - ppc_store_sr(env, sr_num, val); -} - /* SLB management */ #if defined(TARGET_PPC64) void helper_store_slb(CPUPPCState *env, target_ulong rb, target_ulong rs) @@ -2529,17 +2490,6 @@ target_ulong helper_load_slb_vsid(CPUPPCState *env, target_ulong rb) } return rt; } - -void helper_slbia(CPUPPCState *env) -{ - ppc_slb_invalidate_all(env); -} - -void helper_slbie(CPUPPCState *env, target_ulong addr) -{ - ppc_slb_invalidate_one(env, addr); -} - #endif /* defined(TARGET_PPC64) */ /* TLB management */