@@ -25,4 +25,54 @@
/* Reset PIC */
void cpu_openrisc_pic_reset(CPUOpenriscState *env)
{
+ env->picmr = 0x00000000;
+ env->picsr = 0x00000000;
+}
+
+/* openrisc pic handler */
+static void openrisc_pic_cpu_handler(void *opaque, int irq, int level)
+{
+ CPUOpenriscState *env = (CPUOpenriscState *)opaque;
+ int i;
+ uint32_t irq_bit = 1 << irq;
+
+ if (irq > 31 || irq < 0) {
+ return;
+ }
+
+ if (level) {
+ env->picsr |= irq_bit;
+ } else {
+ env->picsr &= ~irq_bit;
+ }
+
+ for (i = 0; i < 32; i++) {
+ if ((env->picsr && (1 << i)) && (env->picmr && (1 << i))) {
+ cpu_interrupt(env, CPU_INTERRUPT_HARD);
+ } else {
+ cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
+ env->picsr &= ~(1 << i);
+ }
+ }
+}
+
+void cpu_openrisc_pic_init(CPUOpenriscState *env)
+{
+ int i;
+ qemu_irq *qi;
+ qi = qemu_allocate_irqs(openrisc_pic_cpu_handler, env, NR_IRQS);
+
+ for (i = 0; i < NR_IRQS; i++) {
+ env->irq[i] = qi[i];
+ }
+}
+
+void cpu_openrisc_store_picmr(CPUOpenriscState *env, uint32_t value)
+{
+ env->picmr |= value;
+}
+
+void cpu_openrisc_store_picsr(CPUOpenriscState *env, uint32_t value)
+{
+ env->picsr &= ~value;
}
@@ -198,6 +198,9 @@ struct CPUOpenriscState {
int (*map_address_data)(struct CPUOpenriscState *env,
target_phys_addr_t *physical, int *prot,
target_ulong address, int rw);
+
+ uint32_t picmr; /* Interrupt mask register */
+ uint32_t picsr; /* Interrupt contrl register*/
#endif
uint32_t fpcsr; /* Float register */
float_status fp_status;
@@ -274,6 +277,8 @@ int cpu_openrisc_handle_mmu_fault(CPUOpenriscState *env, target_ulong address,
void openrisc_reset(CPUOpenriscState *env);
#if !defined(CONFIG_USER_ONLY)
void cpu_openrisc_pic_reset(CPUOpenriscState *env);
+void cpu_openrisc_store_picsr(CPUOpenriscState *env, uint32_t value);
+void cpu_openrisc_store_picmr(CPUOpenriscState *env, uint32_t value);
void openrisc_mmu_init(CPUOpenriscState *env);
int get_phys_nommu(CPUOpenriscState *env, target_phys_addr_t *physical,
add Programmable Interrupt Controller for openrisc. Signed-off-by: Jia Liu <proljc@gmail.com> --- hw/openrisc_pic.c | 50 +++++++++++++++++++++++++++++++++++++++++++++++++ target-openrisc/cpu.h | 5 +++++ 2 files changed, 55 insertions(+)