From patchwork Tue Apr 24 06:14:19 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexey Korolev X-Patchwork-Id: 154608 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 1CB47B6FBB for ; Tue, 24 Apr 2012 16:30:47 +1000 (EST) Received: from localhost ([::1]:50906 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SMZ1Y-0005em-Ra for incoming@patchwork.ozlabs.org; Tue, 24 Apr 2012 02:14:52 -0400 Received: from eggs.gnu.org ([208.118.235.92]:41510) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SMZ1S-0005eh-9l for qemu-devel@nongnu.org; Tue, 24 Apr 2012 02:14:47 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1SMZ1N-0001Ju-6L for qemu-devel@nongnu.org; Tue, 24 Apr 2012 02:14:45 -0400 Received: from usrksweb02.endace.com ([174.143.168.194]:58827) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SMZ1M-0001H3-Vm for qemu-devel@nongnu.org; Tue, 24 Apr 2012 02:14:41 -0400 Received: from mail.et.endace.com ([131.203.121.41]) by usrksweb02.endace.com (8.14.3/8.14.3/Debian-9.2ubuntu1) with ESMTP id q3O6Fdo6030281; Tue, 24 Apr 2012 06:15:40 GMT Received: from [192.168.69.124] (192.168.69.124) by nzhmlmbx01.ad.endace.com (192.168.32.5) with Microsoft SMTP Server (TLS) id 14.1.218.12; Tue, 24 Apr 2012 18:14:24 +1200 Message-ID: <1335248059.13579.5.camel@nzhmlwks0057.ad.endace.com> From: Alexey Korolev To: Date: Tue, 24 Apr 2012 18:14:19 +1200 In-Reply-To: <1335247809.13579.1.camel@nzhmlwks0057.ad.endace.com> References: <1335247809.13579.1.camel@nzhmlwks0057.ad.endace.com> X-Mailer: Evolution 3.2.2- MIME-Version: 1.0 X-Originating-IP: [192.168.69.124] X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 3) X-Received-From: 174.143.168.194 Cc: sfd@endace.com, seabios@seabios.org, qemu-devel@nongnu.org Subject: [Qemu-devel] [PATCH 02/12] pciinit: Move bus bar asignment X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list Reply-To: alexey.korolev@endace.com List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Perform bus bar assignment at same time as normal bar assignment Signed-off-by: Kevin O'Connor Signed-off-by: Alexey Korolev --- src/pciinit.c | 53 ++++++++++++++++++----------------------------------- 1 files changed, 18 insertions(+), 35 deletions(-) diff --git a/src/pciinit.c b/src/pciinit.c index 953f3bd..74ade52 100644 --- a/src/pciinit.c +++ b/src/pciinit.c @@ -526,8 +526,8 @@ pci_region_map_one_entry(struct pci_bus *busses, struct pci_region_entry *entry) { u16 bdf = entry->dev->bdf; struct pci_bus *bus = &busses[pci_bdf_to_bus(bdf)]; + u32 addr = pci_bios_bus_get_addr(bus, entry->type, entry->size); if (entry->bar >= 0) { - u32 addr = pci_bios_bus_get_addr(bus, entry->type, entry->size); dprintf(1, "PCI: map device bdf=%02x:%02x.%x" " bar %d, addr %08x, size %08x [%s]\n", pci_bdf_to_bus(bdf), pci_bdf_to_dev(bdf), pci_bdf_to_fn(bdf), @@ -536,54 +536,37 @@ pci_region_map_one_entry(struct pci_bus *busses, struct pci_region_entry *entry) pci_set_io_region_addr(entry->dev, entry->bar, addr); if (entry->is64) pci_set_io_region_addr(entry->dev, entry->bar + 1, 0); + return; } -} - -static void pci_bios_map_devices(struct pci_bus *busses) -{ - // Setup bases for root bus. - dprintf(1, "PCI: init bases bus 0 (primary)\n"); - pci_bios_init_bus_bases(&busses[0]); - - // Map regions on each secondary bus. - int secondary_bus; - for (secondary_bus=1; secondary_bus<=MaxPCIBus; secondary_bus++) { - struct pci_bus *s = &busses[secondary_bus]; - if (!s->bus_dev) - continue; - u16 bdf = s->bus_dev->bdf; - struct pci_bus *parent = &busses[pci_bdf_to_bus(bdf)]; - int type; - for (type = 0; type < PCI_REGION_TYPE_COUNT; type++) { - s->r[type].base = pci_bios_bus_get_addr( - parent, type, s->r[type].size); - } - dprintf(1, "PCI: init bases bus %d (secondary)\n", secondary_bus); - pci_bios_init_bus_bases(s); - u32 base = s->r[PCI_REGION_TYPE_IO].base; - u32 limit = base + s->r[PCI_REGION_TYPE_IO].size - 1; - pci_config_writeb(bdf, PCI_IO_BASE, base >> PCI_IO_SHIFT); + struct pci_bus *child_bus = &busses[entry->dev->secondary_bus]; + child_bus->r[entry->type].base = addr; + u32 limit = addr + entry->size - 1; + if (entry->type == PCI_REGION_TYPE_IO) { + pci_config_writeb(bdf, PCI_IO_BASE, addr >> PCI_IO_SHIFT); pci_config_writew(bdf, PCI_IO_BASE_UPPER16, 0); pci_config_writeb(bdf, PCI_IO_LIMIT, limit >> PCI_IO_SHIFT); pci_config_writew(bdf, PCI_IO_LIMIT_UPPER16, 0); - - base = s->r[PCI_REGION_TYPE_MEM].base; - limit = base + s->r[PCI_REGION_TYPE_MEM].size - 1; - pci_config_writew(bdf, PCI_MEMORY_BASE, base >> PCI_MEMORY_SHIFT); + } + if (entry->type == PCI_REGION_TYPE_MEM) { + pci_config_writew(bdf, PCI_MEMORY_BASE, addr >> PCI_MEMORY_SHIFT); pci_config_writew(bdf, PCI_MEMORY_LIMIT, limit >> PCI_MEMORY_SHIFT); - - base = s->r[PCI_REGION_TYPE_PREFMEM].base; - limit = base + s->r[PCI_REGION_TYPE_PREFMEM].size - 1; - pci_config_writew(bdf, PCI_PREF_MEMORY_BASE, base >> PCI_PREF_MEMORY_SHIFT); + } + if (entry->type == PCI_REGION_TYPE_PREFMEM) { + pci_config_writew(bdf, PCI_PREF_MEMORY_BASE, addr >> PCI_PREF_MEMORY_SHIFT); pci_config_writew(bdf, PCI_PREF_MEMORY_LIMIT, limit >> PCI_PREF_MEMORY_SHIFT); pci_config_writel(bdf, PCI_PREF_BASE_UPPER32, 0); pci_config_writel(bdf, PCI_PREF_LIMIT_UPPER32, 0); } +} +static void pci_bios_map_devices(struct pci_bus *busses) +{ // Map regions on each device. int bus; for (bus = 0; bus<=MaxPCIBus; bus++) { + dprintf(1, "PCI: init bases bus %d\n", bus); + pci_bios_init_bus_bases(&busses[bus]); int type; for (type = 0; type < PCI_REGION_TYPE_COUNT; type++) { struct pci_region_entry *entry = busses[bus].r[type].list;