| Message ID | 1331922106-11774-1-git-send-email-peter.maydell@linaro.org |
|---|---|
| State | New |
| Headers | show |
On Fri, Mar 16, 2012 at 18:21, Peter Maydell <peter.maydell@linaro.org> wrote: > Hi; this is a pullreq for my target-arm queue. Just three fairly > minor bug fixes this time. Please pull. Thanks, pulled. > Thanks > -- PMM > > The following changes since commit ae7d54d489540b49b7c13a7df7ddc220588a2ced: > > target-lm32/microblaze: Drop second CPU{LM32, MB}State typedef (2012-03-14 19:48:37 -0500) > > are available in the git repository at: > git://git.linaro.org/people/pmaydell/qemu-arm.git target-arm.for-upstream > > Peter Maydell (3): > target-arm: Fix typo in ARM946 cp15 c5 handling > target-arm: Clear IT bits when taking exceptions in v7M > target-arm: Decode SETEND correctly in Thumb > > target-arm/helper.c | 5 ++- > target-arm/translate.c | 63 ++++++++++++++++++++++++++++++----------------- > 2 files changed, 43 insertions(+), 25 deletions(-)
Hi; this is a pullreq for my target-arm queue. Just three fairly minor bug fixes this time. Please pull. Thanks -- PMM The following changes since commit ae7d54d489540b49b7c13a7df7ddc220588a2ced: target-lm32/microblaze: Drop second CPU{LM32, MB}State typedef (2012-03-14 19:48:37 -0500) are available in the git repository at: git://git.linaro.org/people/pmaydell/qemu-arm.git target-arm.for-upstream Peter Maydell (3): target-arm: Fix typo in ARM946 cp15 c5 handling target-arm: Clear IT bits when taking exceptions in v7M target-arm: Decode SETEND correctly in Thumb target-arm/helper.c | 5 ++- target-arm/translate.c | 63 ++++++++++++++++++++++++++++++----------------- 2 files changed, 43 insertions(+), 25 deletions(-)