From patchwork Wed Feb 29 17:54:40 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 143803 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 7A55FB6F9D for ; Thu, 1 Mar 2012 04:55:08 +1100 (EST) Received: from localhost ([::1]:56979 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1S2nk1-0004Vp-VQ for incoming@patchwork.ozlabs.org; Wed, 29 Feb 2012 12:55:05 -0500 Received: from eggs.gnu.org ([208.118.235.92]:36025) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1S2njo-0004Tw-BQ for qemu-devel@nongnu.org; Wed, 29 Feb 2012 12:54:58 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1S2njm-0005pD-Hi for qemu-devel@nongnu.org; Wed, 29 Feb 2012 12:54:51 -0500 Received: from mnementh.archaic.org.uk ([81.2.115.146]:45223) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1S2njm-0005ny-9m for qemu-devel@nongnu.org; Wed, 29 Feb 2012 12:54:50 -0500 Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.72) (envelope-from ) id 1S2njd-00014W-0F; Wed, 29 Feb 2012 17:54:41 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Date: Wed, 29 Feb 2012 17:54:40 +0000 Message-Id: <1330538080-4097-1-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.2.5 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 2) X-Received-From: 81.2.115.146 Cc: Paul Brook , patches@linaro.org Subject: [Qemu-devel] [PATCH] target-arm: Fix typo in ARM946 cp15 c5 handling X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Fix a typo in handling of the ARM946 cp15 c5 c0 0 1 handling (instruction access permission bits) that meant it would return the data access permission bits by mistake. Signed-off-by: Peter Maydell --- (Yeah, it says ARM_FEATURE_MPU but actually (a) the only MPU core we support is the 946 and (b) these registers are 946 specific -- in PMSAv6 and v7 this encoding is the IFSR, the same as it is for VMSA.) target-arm/helper.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/target-arm/helper.c b/target-arm/helper.c index 4929372..8e6da06 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -2030,7 +2030,7 @@ uint32_t HELPER(get_cp15)(CPUState *env, uint32_t insn) return env->cp15.c5_data; case 1: if (arm_feature(env, ARM_FEATURE_MPU)) - return simple_mpu_ap_bits(env->cp15.c5_data); + return simple_mpu_ap_bits(env->cp15.c5_insn); return env->cp15.c5_insn; case 2: if (!arm_feature(env, ARM_FEATURE_MPU))