From patchwork Thu Feb 2 01:49:39 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Graf X-Patchwork-Id: 139079 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [140.186.70.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id E876B104785 for ; Thu, 2 Feb 2012 14:08:28 +1100 (EST) Received: from localhost ([::1]:50117 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Rsloc-0005JT-Lo for incoming@patchwork.ozlabs.org; Wed, 01 Feb 2012 20:50:22 -0500 Received: from eggs.gnu.org ([140.186.70.92]:48483) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Rslo8-0004i3-QV for qemu-devel@nongnu.org; Wed, 01 Feb 2012 20:49:55 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Rslo4-0005UP-0f for qemu-devel@nongnu.org; Wed, 01 Feb 2012 20:49:52 -0500 Received: from cantor2.suse.de ([195.135.220.15]:49113 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Rslo3-0005TA-Qp; Wed, 01 Feb 2012 20:49:47 -0500 Received: from relay2.suse.de (unknown [195.135.220.254]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mx2.suse.de (Postfix) with ESMTP id 8DBB99141C; Thu, 2 Feb 2012 02:49:45 +0100 (CET) From: Alexander Graf To: qemu-ppc@nongnu.org Date: Thu, 2 Feb 2012 02:49:39 +0100 Message-Id: <1328147384-10387-17-git-send-email-agraf@suse.de> X-Mailer: git-send-email 1.7.3.4 In-Reply-To: <1328147384-10387-1-git-send-email-agraf@suse.de> References: <1328147384-10387-1-git-send-email-agraf@suse.de> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.4-2.6 X-Received-From: 195.135.220.15 Cc: Blue Swirl , qemu-devel Developers , Aurelien Jarno Subject: [Qemu-devel] [PATCH 16/21] PPC: Add CPU feature for processor control X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org We're soon going to implement processor control features. Add the feature flag, so we're well prepared. Signed-off-by: Alexander Graf --- target-ppc/cpu.h | 4 +++- 1 files changed, 3 insertions(+), 1 deletions(-) diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index f9cea3d..fbcf488 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -1916,8 +1916,10 @@ enum { PPC2_VSX = 0x0000000000000002ULL, /* Decimal Floating Point (DFP) */ PPC2_DFP = 0x0000000000000004ULL, + /* Embedded.Processor Control */ + PPC2_PRCNTL = 0x0000000000000008ULL, -#define PPC_TCG_INSNS2 (PPC2_BOOKE206) +#define PPC_TCG_INSNS2 (PPC2_BOOKE206 | PPC2_PRCNTL) }; /*****************************************************************************/