From patchwork Fri Nov 25 14:21:33 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Benoit Canet X-Patchwork-Id: 127704 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [140.186.70.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 44B87B702E for ; Sat, 26 Nov 2011 01:22:32 +1100 (EST) Received: from localhost ([::1]:36365 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RTwfZ-0004uz-Uf for incoming@patchwork.ozlabs.org; Fri, 25 Nov 2011 09:22:25 -0500 Received: from eggs.gnu.org ([140.186.70.92]:37284) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RTwev-00034r-PO for qemu-devel@nongnu.org; Fri, 25 Nov 2011 09:21:49 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1RTweu-00084B-Et for qemu-devel@nongnu.org; Fri, 25 Nov 2011 09:21:45 -0500 Received: from mail-ee0-f45.google.com ([74.125.83.45]:60939) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RTweu-00083Z-21 for qemu-devel@nongnu.org; Fri, 25 Nov 2011 09:21:44 -0500 Received: by eeaq15 with SMTP id q15so245810eea.4 for ; Fri, 25 Nov 2011 06:21:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :mime-version:content-type:content-transfer-encoding; bh=hzKbZk4IyF7Hz18baWpTwK6Dya/V7Rf2RvsCQ1c90Hc=; b=p0T884wmak6yxQx3HBga8qO0O7rnC8gY17UQv9e9B3iRUyQABcyuszIduA2QrQZlNv +KF5TM+yFPBaetSMcxobFbl04HSEYHZtuonbuRSYpkR59t2gBJu/6Mcbq6HulEuK3q2t lrtjVMYVzTxzLwFqcyKmbVgHf2ljjK3AVUnnQ= Received: by 10.180.85.67 with SMTP id f3mr29166864wiz.52.1322230903144; Fri, 25 Nov 2011 06:21:43 -0800 (PST) Received: from Laure.box.in.chocolate-blue.net ([109.190.18.76]) by mx.google.com with ESMTPS id x8sm10742335wix.17.2011.11.25.06.21.41 (version=SSLv3 cipher=OTHER); Fri, 25 Nov 2011 06:21:42 -0800 (PST) From: =?UTF-8?q?Beno=C3=AEt=20Canet?= To: qemu-devel@nongnu.org Date: Fri, 25 Nov 2011 15:21:33 +0100 Message-Id: <1322230897-7470-2-git-send-email-benoit.canet@gmail.com> X-Mailer: git-send-email 1.7.7.3 In-Reply-To: <1322230897-7470-1-git-send-email-benoit.canet@gmail.com> References: <1322230897-7470-1-git-send-email-benoit.canet@gmail.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 2) X-Received-From: 74.125.83.45 Cc: peter.maydell@linaro.org, =?UTF-8?q?Beno=C3=AEt=20Canet?= , avi@redhat.com Subject: [Qemu-devel] [PATCH 1/5] omap_sx1: convert to memory API X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Signed-off-by: Benoît Canet --- hw/omap_sx1.c | 113 ++++++++++++++++++++++++++++++--------------------------- 1 files changed, 59 insertions(+), 54 deletions(-) diff --git a/hw/omap_sx1.c b/hw/omap_sx1.c index fe53545..b056bc9 100644 --- a/hw/omap_sx1.c +++ b/hw/omap_sx1.c @@ -59,46 +59,42 @@ * - 1 RTC */ -static uint32_t static_readb(void *opaque, target_phys_addr_t offset) -{ - uint32_t *val = (uint32_t *) opaque; - - return *val >> ((offset & 3) << 3); -} - -static uint32_t static_readh(void *opaque, target_phys_addr_t offset) -{ - uint32_t *val = (uint32_t *) opaque; - - return *val >> ((offset & 1) << 3); -} - -static uint32_t static_readw(void *opaque, target_phys_addr_t offset) +static uint64_t static_read(void *opaque, target_phys_addr_t offset, + unsigned size) { uint32_t *val = (uint32_t *) opaque; + uint32_t mask = 0; + + switch (size) { + case 1: + mask = 3; + break; + case 2: + mask = 1; + break; + case 4: + mask = 0; + break; + default: + mask = 0; + } - return *val >> ((offset & 0) << 3); + return *val >> ((offset & mask) << 3); } static void static_write(void *opaque, target_phys_addr_t offset, - uint32_t value) + uint64_t value, unsigned size) { #ifdef SPY - printf("%s: value %08lx written at " PA_FMT "\n", - __FUNCTION__, value, offset); + printf("%s: value %" PRIx64 " %u bytes written at 0x%x\n", + __func__, value, size, (int)offset); #endif } -static CPUReadMemoryFunc * const static_readfn[] = { - static_readb, - static_readh, - static_readw, -}; - -static CPUWriteMemoryFunc * const static_writefn[] = { - static_write, - static_write, - static_write, +static const MemoryRegionOps static_ops = { + .read = static_read, + .write = static_write, + .endianness = DEVICE_NATIVE_ENDIAN, }; #define sdram_size 0x02000000 @@ -123,7 +119,9 @@ static void sx1_init(ram_addr_t ram_size, { struct omap_mpu_state_s *cpu; MemoryRegion *address_space = get_system_memory(); - int io; + MemoryRegion *flash = g_new(MemoryRegion, 1); + MemoryRegion *flash_1 = g_new(MemoryRegion, 1); + MemoryRegion *cs = g_new(MemoryRegion, 4); static uint32_t cs0val = 0x00213090; static uint32_t cs1val = 0x00215070; static uint32_t cs2val = 0x00001139; @@ -140,20 +138,25 @@ static void sx1_init(ram_addr_t ram_size, cpu = omap310_mpu_init(address_space, sx1_binfo.ram_size, cpu_model); /* External Flash (EMIFS) */ - cpu_register_physical_memory(OMAP_CS0_BASE, flash_size, - qemu_ram_alloc(NULL, "omap_sx1.flash0-0", - flash_size) | IO_MEM_ROM); - - io = cpu_register_io_memory(static_readfn, static_writefn, &cs0val, - DEVICE_NATIVE_ENDIAN); - cpu_register_physical_memory(OMAP_CS0_BASE + flash_size, - OMAP_CS0_SIZE - flash_size, io); - io = cpu_register_io_memory(static_readfn, static_writefn, &cs2val, - DEVICE_NATIVE_ENDIAN); - cpu_register_physical_memory(OMAP_CS2_BASE, OMAP_CS2_SIZE, io); - io = cpu_register_io_memory(static_readfn, static_writefn, &cs3val, - DEVICE_NATIVE_ENDIAN); - cpu_register_physical_memory(OMAP_CS3_BASE, OMAP_CS3_SIZE, io); + memory_region_init_ram(flash, NULL, "omap_sx1.flash0-0", flash_size); + memory_region_set_readonly(flash, true); + memory_region_add_subregion(address_space, OMAP_CS0_BASE, flash); + + memory_region_init_io(&cs[0], &static_ops, &cs0val, + "sx1.cs0", OMAP_CS0_SIZE - flash_size); + memory_region_add_subregion(address_space, + OMAP_CS0_BASE + flash_size, &cs[0]); + + + memory_region_init_io(&cs[2], &static_ops, &cs2val, + "sx1.cs2", OMAP_CS2_SIZE); + memory_region_add_subregion(address_space, + OMAP_CS2_BASE, &cs[2]); + + memory_region_init_io(&cs[3], &static_ops, &cs3val, + "sx1.cs3", OMAP_CS3_SIZE); + memory_region_add_subregion(address_space, + OMAP_CS2_BASE, &cs[3]); fl_idx = 0; #ifdef TARGET_WORDS_BIGENDIAN @@ -176,13 +179,14 @@ static void sx1_init(ram_addr_t ram_size, if ((version == 1) && (dinfo = drive_get(IF_PFLASH, 0, fl_idx)) != NULL) { - cpu_register_physical_memory(OMAP_CS1_BASE, flash1_size, - qemu_ram_alloc(NULL, "omap_sx1.flash1-0", - flash1_size) | IO_MEM_ROM); - io = cpu_register_io_memory(static_readfn, static_writefn, &cs1val, - DEVICE_NATIVE_ENDIAN); - cpu_register_physical_memory(OMAP_CS1_BASE + flash1_size, - OMAP_CS1_SIZE - flash1_size, io); + memory_region_init_ram(flash_1, NULL, "omap_sx1.flash1-0", flash1_size); + memory_region_set_readonly(flash_1, true); + memory_region_add_subregion(address_space, OMAP_CS1_BASE, flash_1); + + memory_region_init_io(&cs[1], &static_ops, &cs1val, + "sx1.cs1", OMAP_CS1_SIZE - flash1_size); + memory_region_add_subregion(address_space, + OMAP_CS1_BASE + flash1_size, &cs[1]); if (!pflash_cfi01_register(OMAP_CS1_BASE, NULL, "omap_sx1.flash1-1", flash1_size, @@ -194,9 +198,10 @@ static void sx1_init(ram_addr_t ram_size, } fl_idx++; } else { - io = cpu_register_io_memory(static_readfn, static_writefn, &cs1val, - DEVICE_NATIVE_ENDIAN); - cpu_register_physical_memory(OMAP_CS1_BASE, OMAP_CS1_SIZE, io); + memory_region_init_io(&cs[1], &static_ops, &cs1val, + "sx1.cs1", OMAP_CS1_SIZE); + memory_region_add_subregion(address_space, + OMAP_CS1_BASE, &cs[1]); } if (!kernel_filename && !fl_idx) {