From patchwork Thu Oct 13 19:45:14 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benoit Canet X-Patchwork-Id: 119591 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [140.186.70.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 0C9FBB70C8 for ; Fri, 14 Oct 2011 06:55:50 +1100 (EST) Received: from localhost ([::1]:37552 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RERNV-0001pa-A5 for incoming@patchwork.ozlabs.org; Thu, 13 Oct 2011 15:55:41 -0400 Received: from eggs.gnu.org ([140.186.70.92]:53936) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RERNK-0001oc-GM for qemu-devel@nongnu.org; Thu, 13 Oct 2011 15:55:31 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1RERNJ-0007qr-Gs for qemu-devel@nongnu.org; Thu, 13 Oct 2011 15:55:30 -0400 Received: from mail-ww0-f53.google.com ([74.125.82.53]:46007) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RERNJ-0007qO-Ax for qemu-devel@nongnu.org; Thu, 13 Oct 2011 15:55:29 -0400 Received: by mail-ww0-f53.google.com with SMTP id 14so2135097wwg.10 for ; Thu, 13 Oct 2011 12:55:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=U5Mh3XgG+hPSoME5Wjge+wlIbnXZVpYtFXuMjIvXOBQ=; b=UrKe6k5dH6eu28RF0yH7GqgW7sIr3VDON7t1s0DeWDhWSNRcCfi40teGEc5d0TaiQr GKEZx4bQEL8HDTQfINZBwYeQa5Fbz2qeDZ498DmpZAny/qP7Ned1IUz4jmA9tGV4Yi4p tvDruS1f1gVfmXLG/btqRnBa/g8LA07RJHTdk= Received: by 10.227.11.75 with SMTP id s11mr1857275wbs.62.1318535728650; Thu, 13 Oct 2011 12:55:28 -0700 (PDT) Received: from localhost.localdomain (AMontsouris-651-1-196-196.w83-202.abo.wanadoo.fr. [83.202.59.196]) by mx.google.com with ESMTPS id l9sm8738894wba.5.2011.10.13.12.55.27 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 13 Oct 2011 12:55:27 -0700 (PDT) From: =?UTF-8?q?Beno=C3=AEt=20Canet?= To: qemu-devel@nongnu.org Date: Thu, 13 Oct 2011 21:45:14 +0200 Message-Id: <1318535119-979-3-git-send-email-benoit.canet@gmail.com> X-Mailer: git-send-email 1.7.5.4 In-Reply-To: <1318535119-979-1-git-send-email-benoit.canet@gmail.com> References: <1318535119-979-1-git-send-email-benoit.canet@gmail.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 2) X-Received-From: 74.125.82.53 Cc: =?UTF-8?q?Beno=C3=AEt=20Canet?= Subject: [Qemu-devel] [PATCH 2/7] integratorcp: convert icp pic to memory API X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org --- hw/integratorcp.c | 29 +++++++++++------------------ 1 files changed, 11 insertions(+), 18 deletions(-) diff --git a/hw/integratorcp.c b/hw/integratorcp.c index 0dc84c4..e3a5f24 100644 --- a/hw/integratorcp.c +++ b/hw/integratorcp.c @@ -279,6 +279,7 @@ static int integratorcm_init(SysBusDevice *dev) typedef struct icp_pic_state { SysBusDevice busdev; + MemoryRegion iomem; uint32_t level; uint32_t irq_enabled; uint32_t fiq_enabled; @@ -306,7 +307,8 @@ static void icp_pic_set_irq(void *opaque, int irq, int level) icp_pic_update(s); } -static uint32_t icp_pic_read(void *opaque, target_phys_addr_t offset) +static uint64_t icp_pic_read(void *opaque, target_phys_addr_t offset, + unsigned size) { icp_pic_state *s = (icp_pic_state *)opaque; @@ -335,7 +337,7 @@ static uint32_t icp_pic_read(void *opaque, target_phys_addr_t offset) } static void icp_pic_write(void *opaque, target_phys_addr_t offset, - uint32_t value) + uint64_t value, unsigned size) { icp_pic_state *s = (icp_pic_state *)opaque; @@ -371,30 +373,21 @@ static void icp_pic_write(void *opaque, target_phys_addr_t offset, icp_pic_update(s); } -static CPUReadMemoryFunc * const icp_pic_readfn[] = { - icp_pic_read, - icp_pic_read, - icp_pic_read -}; - -static CPUWriteMemoryFunc * const icp_pic_writefn[] = { - icp_pic_write, - icp_pic_write, - icp_pic_write -}; +static const MemoryRegionOps icp_pic_ops = { + .read = icp_pic_read, + .write = icp_pic_write, + .endianness = DEVICE_NATIVE_ENDIAN, +}; static int icp_pic_init(SysBusDevice *dev) { icp_pic_state *s = FROM_SYSBUS(icp_pic_state, dev); - int iomemtype; qdev_init_gpio_in(&dev->qdev, icp_pic_set_irq, 32); sysbus_init_irq(dev, &s->parent_irq); sysbus_init_irq(dev, &s->parent_fiq); - iomemtype = cpu_register_io_memory(icp_pic_readfn, - icp_pic_writefn, s, - DEVICE_NATIVE_ENDIAN); - sysbus_init_mmio(dev, 0x00800000, iomemtype); + memory_region_init_io(&s->iomem, &icp_pic_ops, s, "icp-pic", 0x00800000); + sysbus_init_mmio_region(dev, &s->iomem); return 0; }