diff mbox

[3/5] tcg/s390: Only one call output register needed for 64 bit hosts

Message ID 1315213622-7051-4-git-send-email-weil@mail.berlios.de
State Accepted
Headers show

Commit Message

Stefan Weil Sept. 5, 2011, 9:07 a.m. UTC
The second register is only needed for 32 bit hosts.

Cc: Alexander Graf <agraf@suse.de>
Signed-off-by: Stefan Weil <weil@mail.berlios.de>
---
 tcg/s390/tcg-target.c |    4 +++-
 1 files changed, 3 insertions(+), 1 deletions(-)

Comments

Alexander Graf Sept. 7, 2011, 11:32 a.m. UTC | #1
On 05.09.2011, at 11:07, Stefan Weil wrote:

> The second register is only needed for 32 bit hosts.

Looks sane to me. Richard, mind to ack?


Alex

> 
> Cc: Alexander Graf <agraf@suse.de>
> Signed-off-by: Stefan Weil <weil@mail.berlios.de>
> ---
> tcg/s390/tcg-target.c |    4 +++-
> 1 files changed, 3 insertions(+), 1 deletions(-)
> 
> diff --git a/tcg/s390/tcg-target.c b/tcg/s390/tcg-target.c
> index 2fc5646..b58df71 100644
> --- a/tcg/s390/tcg-target.c
> +++ b/tcg/s390/tcg-target.c
> @@ -252,7 +252,9 @@ static const int tcg_target_call_iarg_regs[] = {
> 
> static const int tcg_target_call_oarg_regs[] = {
>     TCG_REG_R2,
> -    TCG_REG_R3,
> +#if TCG_TARGET_REG_BITS == 32
> +    TCG_REG_R3
> +#endif
> };
> 
> #define S390_CC_EQ      8
> -- 
> 1.7.0.4
>
Richard Henderson Sept. 8, 2011, 8:12 a.m. UTC | #2
On 09/07/2011 12:32 PM, Alexander Graf wrote:
> 
> On 05.09.2011, at 11:07, Stefan Weil wrote:
> 
>> The second register is only needed for 32 bit hosts.
> 
> Looks sane to me. Richard, mind to ack?
> 
> 
> Alex
> 
>>
>> Cc: Alexander Graf <agraf@suse.de>
>> Signed-off-by: Stefan Weil <weil@mail.berlios.de>

Acked-by: Richard Henderson <rth@twiddle.net>


r~
diff mbox

Patch

diff --git a/tcg/s390/tcg-target.c b/tcg/s390/tcg-target.c
index 2fc5646..b58df71 100644
--- a/tcg/s390/tcg-target.c
+++ b/tcg/s390/tcg-target.c
@@ -252,7 +252,9 @@  static const int tcg_target_call_iarg_regs[] = {
 
 static const int tcg_target_call_oarg_regs[] = {
     TCG_REG_R2,
-    TCG_REG_R3,
+#if TCG_TARGET_REG_BITS == 32
+    TCG_REG_R3
+#endif
 };
 
 #define S390_CC_EQ      8