From patchwork Thu Aug 25 20:05:08 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 111661 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [140.186.70.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id B6160B6F8D for ; Fri, 26 Aug 2011 06:27:39 +1000 (EST) Received: from localhost ([::1]:43107 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QwgWT-00014A-Fu for incoming@patchwork.ozlabs.org; Thu, 25 Aug 2011 16:27:33 -0400 Received: from eggs.gnu.org ([140.186.70.92]:37294) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QwgVc-0007uY-KT for qemu-devel@nongnu.org; Thu, 25 Aug 2011 16:26:43 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1QwgVZ-0008MU-2c for qemu-devel@nongnu.org; Thu, 25 Aug 2011 16:26:39 -0400 Received: from mnementh.archaic.org.uk ([81.2.115.146]:58376) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QwgVY-0008IM-R7 for qemu-devel@nongnu.org; Thu, 25 Aug 2011 16:26:37 -0400 Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.72) (envelope-from ) id 1QwgAp-0005LV-IX; Thu, 25 Aug 2011 21:05:11 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Date: Thu, 25 Aug 2011 21:05:08 +0100 Message-Id: <1314302711-20498-15-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1314302711-20498-1-git-send-email-peter.maydell@linaro.org> References: <1314302711-20498-1-git-send-email-peter.maydell@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 2) X-Received-From: 81.2.115.146 Cc: patches@linaro.org Subject: [Qemu-devel] [PATCH 14/17] omap_gpmc: Accept a zero mask field on omap3630 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Juha Riihimäki OMAP3630 adds an extra bit of address masking, so a mask of 0xb1111 is valid. Unfortunately the GPMC_REVISION is the same as on the OMAP3430 which only has three bits of address masking, so we have to derive this feature directly from the OMAP revision rather than from the GPMC revision. Signed-off-by: Juha Riihimäki [Riku Voipio: Fixes and restructuring patchset] Signed-off-by: Riku Voipio [Peter Maydell: More fixes and cleanups for upstream submission] Signed-off-by: Peter Maydell --- hw/omap_gpmc.c | 11 ++++++----- 1 files changed, 6 insertions(+), 5 deletions(-) diff --git a/hw/omap_gpmc.c b/hw/omap_gpmc.c index d2de72f..0326d49 100644 --- a/hw/omap_gpmc.c +++ b/hw/omap_gpmc.c @@ -28,6 +28,7 @@ struct omap_gpmc_s { qemu_irq irq; MemoryRegion iomem; + int accept_256; uint8_t revision; uint8_t sysconfig; @@ -198,11 +199,10 @@ static void omap_gpmc_cs_map(struct omap_gpmc_s *s, int cs) } /* TODO: check for overlapping regions and report access errors */ - if ((mask != 0x8 && mask != 0xc && mask != 0xe && mask != 0xf) || - (base & 0x0f & ~mask)) { - fprintf(stderr, "%s: wrong cs address mapping/decoding!\n", - __FUNCTION__); - return; + if (mask != 0x8 && mask != 0xc && mask != 0xe && mask != 0xf + && !(s->accept_256 && !mask)) { + fprintf(stderr, "%s: invalid chip-select mask address (0x%x)\n", + __func__, mask); } base <<= 24; @@ -570,6 +570,7 @@ struct omap_gpmc_s *omap_gpmc_init(struct omap_mpu_state_s *mpu, memory_region_add_subregion(get_system_memory(), base, &s->iomem); s->irq = irq; + s->accept_256 = cpu_is_omap3630(mpu); s->revision = cpu_class_omap3(mpu) ? 0x50 : 0x20; omap_gpmc_reset(s);