From patchwork Mon Aug 15 14:17:21 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Avi Kivity X-Patchwork-Id: 110044 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [140.186.70.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 8DC0AB6F57 for ; Tue, 16 Aug 2011 00:56:14 +1000 (EST) Received: from localhost ([::1]:41658 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Qsy0f-0001lW-OU for incoming@patchwork.ozlabs.org; Mon, 15 Aug 2011 10:19:21 -0400 Received: from eggs.gnu.org ([140.186.70.92]:48030) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QsxzB-0006Hz-FX for qemu-devel@nongnu.org; Mon, 15 Aug 2011 10:17:56 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Qsxz6-0004TA-U2 for qemu-devel@nongnu.org; Mon, 15 Aug 2011 10:17:49 -0400 Received: from mx1.redhat.com ([209.132.183.28]:47496) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Qsxz6-0004Rg-Ia for qemu-devel@nongnu.org; Mon, 15 Aug 2011 10:17:44 -0400 Received: from int-mx09.intmail.prod.int.phx2.redhat.com (int-mx09.intmail.prod.int.phx2.redhat.com [10.5.11.22]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id p7FEHh78028177 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Mon, 15 Aug 2011 10:17:43 -0400 Received: from cleopatra.tlv.redhat.com (cleopatra.tlv.redhat.com [10.35.255.11]) by int-mx09.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id p7FEHgUG001057; Mon, 15 Aug 2011 10:17:42 -0400 Received: from s01.tlv.redhat.com (s01.tlv.redhat.com [10.35.255.8]) by cleopatra.tlv.redhat.com (Postfix) with ESMTP id 93B76250B4F; Mon, 15 Aug 2011 17:17:40 +0300 (IDT) From: Avi Kivity To: Anthony Liguori , qemu-devel@nongnu.org Date: Mon, 15 Aug 2011 17:17:21 +0300 Message-Id: <1313417858-6454-8-git-send-email-avi@redhat.com> In-Reply-To: <1313417858-6454-1-git-send-email-avi@redhat.com> References: <1313417858-6454-1-git-send-email-avi@redhat.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.22 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 209.132.183.28 Cc: kvm@vger.kernel.org Subject: [Qemu-devel] [PATCH v2 07/24] gt64xxx.c: convert to memory API X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Signed-off-by: Avi Kivity --- hw/gt64xxx.c | 36 +++++++++++++++--------------------- 1 files changed, 15 insertions(+), 21 deletions(-) diff --git a/hw/gt64xxx.c b/hw/gt64xxx.c index d541558..6af9782 100644 --- a/hw/gt64xxx.c +++ b/hw/gt64xxx.c @@ -227,7 +227,7 @@ #define PCI_MAPPING_ENTRY(regname) \ target_phys_addr_t regname ##_start; \ target_phys_addr_t regname ##_length; \ - int regname ##_handle + MemoryRegion regname ##_mem typedef struct GT64120State { SysBusDevice busdev; @@ -269,9 +269,9 @@ static void gt64120_isd_mapping(GT64120State *s) target_phys_addr_t start = s->regs[GT_ISD] << 21; target_phys_addr_t length = 0x1000; - if (s->ISD_length) - cpu_register_physical_memory(s->ISD_start, s->ISD_length, - IO_MEM_UNASSIGNED); + if (s->ISD_length) { + memory_region_del_subregion(get_system_memory(), &s->ISD_mem); + } check_reserved_space(&start, &length); length = 0x1000; /* Map new address */ @@ -279,7 +279,7 @@ static void gt64120_isd_mapping(GT64120State *s) length, start, s->ISD_handle); s->ISD_start = start; s->ISD_length = length; - cpu_register_physical_memory(s->ISD_start, s->ISD_length, s->ISD_handle); + memory_region_add_subregion(get_system_memory(), s->ISD_start, &s->ISD_mem); } static void gt64120_pci_mapping(GT64120State *s) @@ -290,7 +290,8 @@ static void gt64120_pci_mapping(GT64120State *s) /* Unmap old IO address */ if (s->PCI0IO_length) { - cpu_register_physical_memory(s->PCI0IO_start, s->PCI0IO_length, IO_MEM_UNASSIGNED); + memory_region_del_subregion(get_system_memory(), &s->PCI0IO_mem); + memory_region_destroy(&s->PCI0IO_mem); } /* Map new IO address */ s->PCI0IO_start = s->regs[GT_PCI0IOLD] << 21; @@ -301,7 +302,7 @@ static void gt64120_pci_mapping(GT64120State *s) } static void gt64120_writel (void *opaque, target_phys_addr_t addr, - uint32_t val) + uint64_t val, unsigned size) { GT64120State *s = opaque; uint32_t saddr; @@ -579,8 +580,8 @@ static void gt64120_writel (void *opaque, target_phys_addr_t addr, } } -static uint32_t gt64120_readl (void *opaque, - target_phys_addr_t addr) +static uint64_t gt64120_readl (void *opaque, + target_phys_addr_t addr, unsigned size) { GT64120State *s = opaque; uint32_t val; @@ -851,16 +852,10 @@ static uint32_t gt64120_readl (void *opaque, return val; } -static CPUWriteMemoryFunc * const gt64120_write[] = { - >64120_writel, - >64120_writel, - >64120_writel, -}; - -static CPUReadMemoryFunc * const gt64120_read[] = { - >64120_readl, - >64120_readl, - >64120_readl, +static const MemoryRegionOps isd_mem_ops = { + .read = gt64120_readl, + .write = gt64120_writel, + .endianness = DEVICE_NATIVE_ENDIAN, }; static int gt64120_pci_map_irq(PCIDevice *pci_dev, int irq_num) @@ -1097,8 +1092,7 @@ PCIBus *gt64120_register(qemu_irq *pic) get_system_memory(), get_system_io(), PCI_DEVFN(18, 0), 4); - d->ISD_handle = cpu_register_io_memory(gt64120_read, gt64120_write, d, - DEVICE_NATIVE_ENDIAN); + memory_region_init_io(&d->ISD_mem, &isd_mem_ops, d, "isd-mem", 0x1000); pci_create_simple(d->pci.bus, PCI_DEVFN(0, 0), "gt64120_pci"); return d->pci.bus;