From patchwork Tue Nov 23 18:53:46 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 72739 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 015D0B70DF for ; Wed, 24 Nov 2010 06:13:19 +1100 (EST) Received: from localhost ([127.0.0.1]:59583 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1PKyIm-0005uh-6T for incoming@patchwork.ozlabs.org; Tue, 23 Nov 2010 14:13:16 -0500 Received: from [140.186.70.92] (port=51339 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1PKy0F-0004AJ-PB for qemu-devel@nongnu.org; Tue, 23 Nov 2010 13:54:08 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1PKy0B-0007BN-Eo for qemu-devel@nongnu.org; Tue, 23 Nov 2010 13:54:07 -0500 Received: from mnementh.archaic.org.uk ([81.2.115.146]:30458) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1PKy0B-0007B2-3j for qemu-devel@nongnu.org; Tue, 23 Nov 2010 13:54:03 -0500 Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.69) (envelope-from ) id 1PKxzz-0003R4-Eo; Tue, 23 Nov 2010 18:53:51 +0000 From: Peter Maydell To: Anthony Liguori , qemu-devel@nongnu.org Date: Tue, 23 Nov 2010 18:53:46 +0000 Message-Id: <1290538431-13170-8-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1290538431-13170-1-git-send-email-peter.maydell@linaro.org> References: <1290538431-13170-1-git-send-email-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 2) Cc: Subject: [Qemu-devel] [PATCH 07/12] ARM: Return correct result for float-to-integer conversion of NaN X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org The ARM architecture mandates that converting a NaN value to integer gives zero (if Invalid Operation FP exceptions are not being trapped). This isn't the behaviour of the SoftFloat library, so NaNs must be special-cased. Signed-off-by: Peter Maydell --- target-arm/helper.c | 44 ++++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 44 insertions(+), 0 deletions(-) diff --git a/target-arm/helper.c b/target-arm/helper.c index 996d40d..72ba314 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -2445,43 +2445,84 @@ float64 VFP_HELPER(sito, d)(float32 x, CPUState *env) } /* Float to integer conversion. */ + +/* Helper routines to identify NaNs. Note that softfloat's + * floatxx_is_nan() actually only returns true for quiet NaNs. + * A NaN has an exponent field all 1s and a fraction field + * anything except all zeros. Conveniently we can detect this + * by masking out the sign bit and doing an unsigned comparison. + */ +static int float32_is_any_nan(float32 x) +{ + return ((float32_val(x) & ~(1 << 31)) > 0x7f800000UL); +} + +static int float64_is_any_nan(float64 x) +{ + return ((float64_val(x) & ~(1ULL << 63)) > 0x7ff0000000000000ULL); +} + float32 VFP_HELPER(toui, s)(float32 x, CPUState *env) { + if (float32_is_any_nan(x)) { + return float32_zero; + } return vfp_itos(float32_to_uint32(x, &env->vfp.fp_status)); } float32 VFP_HELPER(toui, d)(float64 x, CPUState *env) { + if (float64_is_any_nan(x)) { + return float32_zero; + } return vfp_itos(float64_to_uint32(x, &env->vfp.fp_status)); } float32 VFP_HELPER(tosi, s)(float32 x, CPUState *env) { + if (float32_is_any_nan(x)) { + return float32_zero; + } return vfp_itos(float32_to_int32(x, &env->vfp.fp_status)); } float32 VFP_HELPER(tosi, d)(float64 x, CPUState *env) { + if (float64_is_any_nan(x)) { + return float32_zero; + } return vfp_itos(float64_to_int32(x, &env->vfp.fp_status)); } float32 VFP_HELPER(touiz, s)(float32 x, CPUState *env) { + if (float32_is_any_nan(x)) { + return float32_zero; + } return vfp_itos(float32_to_uint32_round_to_zero(x, &env->vfp.fp_status)); } float32 VFP_HELPER(touiz, d)(float64 x, CPUState *env) { + if (float64_is_any_nan(x)) { + return float32_zero; + } return vfp_itos(float64_to_uint32_round_to_zero(x, &env->vfp.fp_status)); } float32 VFP_HELPER(tosiz, s)(float32 x, CPUState *env) { + if (float32_is_any_nan(x)) { + return float32_zero; + } return vfp_itos(float32_to_int32_round_to_zero(x, &env->vfp.fp_status)); } float32 VFP_HELPER(tosiz, d)(float64 x, CPUState *env) { + if (float64_is_any_nan(x)) { + return float32_zero; + } return vfp_itos(float64_to_int32_round_to_zero(x, &env->vfp.fp_status)); } @@ -2508,6 +2549,9 @@ ftype VFP_HELPER(name##to, p)(ftype x, uint32_t shift, CPUState *env) \ ftype VFP_HELPER(to##name, p)(ftype x, uint32_t shift, CPUState *env) \ { \ ftype tmp; \ + if (ftype##_is_any_nan(x)) { \ + return ftype##_zero; \ + } \ tmp = ftype##_scalbn(x, shift, &env->vfp.fp_status); \ return vfp_ito##p((itype)ftype##_to_##sign##int32_round_to_zero(tmp, \ &env->vfp.fp_status)); \