From patchwork Mon Jul 12 05:05:31 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Courbot X-Patchwork-Id: 58571 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 92A22B6F44 for ; Mon, 12 Jul 2010 15:05:57 +1000 (EST) Received: from localhost ([127.0.0.1]:59660 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1OYBDH-00017n-0M for incoming@patchwork.ozlabs.org; Mon, 12 Jul 2010 01:05:55 -0400 Received: from [140.186.70.92] (port=42260 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1OYBBG-00009s-CU for qemu-devel@nongnu.org; Mon, 12 Jul 2010 01:03:51 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.69) (envelope-from ) id 1OYBBF-0005Vk-3v for qemu-devel@nongnu.org; Mon, 12 Jul 2010 01:03:50 -0400 Received: from mail-pw0-f45.google.com ([209.85.160.45]:33448) by eggs.gnu.org with esmtp (Exim 4.69) (envelope-from ) id 1OYBBE-0005Vg-Ti for qemu-devel@nongnu.org; Mon, 12 Jul 2010 01:03:49 -0400 Received: by pwi2 with SMTP id 2so1664810pwi.4 for ; Sun, 11 Jul 2010 22:03:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:from:to:cc:subject:date :message-id:x-mailer:in-reply-to:references; bh=8sqQoHqYj45+bmGZmldl69HF6yZOe14jX+8Cfyh+j4E=; b=qkYNZ6A5MIiSyqMlggU1qQtZkTAcTBGOWhMz2FUXE89qWwTVR8x321YhhqhYcYm9Od GjlKPCABbgdvvFBXjgBpW8ubU0akajaFAkMpbGDYm6BaWi+fVHOjMDqmdVlEyO4qacLR p/zbZiiDfG7Nzqgj1WNmOyfCiDk09qWKDMCss= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; b=HqlBmm7UMhfveDngfcLjjHy1huedPbwxwLK2R62myxkSVW/+kAZ38Z5h2b/XGKvyCP kIHzMJLfsmEtm2Amg0dcoiv3bN3bNhvcuv4oTG5VEY9vg4hlDBFTzj21w80HLTPJNfPl 4ab+i+43bENObH6mTG546EVAb7kN2ea/ZBkvY= Received: by 10.142.139.5 with SMTP id m5mr6299608wfd.312.1278911026379; Sun, 11 Jul 2010 22:03:46 -0700 (PDT) Received: from localhost.localdomain (fw-cisco.dcl.info.waseda.ac.jp [133.9.216.204]) by mx.google.com with ESMTPS id w8sm4390585wfd.19.2010.07.11.22.03.44 (version=TLSv1/SSLv3 cipher=RC4-MD5); Sun, 11 Jul 2010 22:03:45 -0700 (PDT) From: Alexandre Courbot To: qemu-devel@nongnu.org Date: Mon, 12 Jul 2010 14:05:31 +0900 Message-Id: <1278911132-7828-2-git-send-email-gnurou@gmail.com> X-Mailer: git-send-email 1.7.1.1 In-Reply-To: <1278911132-7828-1-git-send-email-gnurou@gmail.com> References: <1278911132-7828-1-git-send-email-gnurou@gmail.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 2) Cc: Alexandre Courbot Subject: [Qemu-devel] [PATCH v2 1/2] target-sh4: Split the LDST macro into 2 sub-macros X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org The LDST macro is used to generate ldc and stc instructions that work with a specific register. However, the SGR register only supports stc up to SH4A, which supports both stc and ldc. This patch creates two sub-macros named LD and ST that handle generating ldc and stc instructions separately, and redeclares LDST to use these sub-macro. Signed-off-by: Alexandre Courbot --- target-sh4/translate.c | 8 ++++++-- 1 files changed, 6 insertions(+), 2 deletions(-) diff --git a/target-sh4/translate.c b/target-sh4/translate.c index d0d6c00..3abafd0 100644 --- a/target-sh4/translate.c +++ b/target-sh4/translate.c @@ -1511,7 +1511,7 @@ static void _decode_opc(DisasContext * ctx) tcg_temp_free(addr); } return; -#define LDST(reg,ldnum,ldpnum,stnum,stpnum,prechk) \ +#define LD(reg,ldnum,ldpnum,prechk) \ case ldnum: \ prechk \ tcg_gen_mov_i32 (cpu_##reg, REG(B11_8)); \ @@ -1520,7 +1520,8 @@ static void _decode_opc(DisasContext * ctx) prechk \ tcg_gen_qemu_ld32s (cpu_##reg, REG(B11_8), ctx->memidx); \ tcg_gen_addi_i32(REG(B11_8), REG(B11_8), 4); \ - return; \ + return; +#define ST(reg,stnum,stpnum,prechk) \ case stnum: \ prechk \ tcg_gen_mov_i32 (REG(B11_8), cpu_##reg); \ @@ -1535,6 +1536,9 @@ static void _decode_opc(DisasContext * ctx) tcg_temp_free(addr); \ } \ return; +#define LDST(reg,ldnum,ldpnum,stnum,stpnum,prechk) \ + LD(reg,ldnum,ldpnum,prechk) \ + ST(reg,stnum,stpnum,prechk) LDST(gbr, 0x401e, 0x4017, 0x0012, 0x4013, {}) LDST(vbr, 0x402e, 0x4027, 0x0022, 0x4023, CHECK_PRIVILEGED) LDST(ssr, 0x403e, 0x4037, 0x0032, 0x4033, CHECK_PRIVILEGED)