From patchwork Fri May 21 07:50:40 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andre Przywara X-Patchwork-Id: 53159 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 89E15B7D52 for ; Sat, 22 May 2010 00:12:47 +1000 (EST) Received: from localhost ([127.0.0.1]:53103 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1OFSxw-0004YQ-8m for incoming@patchwork.ozlabs.org; Fri, 21 May 2010 10:12:44 -0400 Received: from [140.186.70.92] (port=50184 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1OFSw8-00039S-7j for qemu-devel@nongnu.org; Fri, 21 May 2010 10:10:53 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.69) (envelope-from ) id 1OFSw1-0007Xf-Jl for qemu-devel@nongnu.org; Fri, 21 May 2010 10:10:52 -0400 Received: from tx2ehsobe004.messaging.microsoft.com ([65.55.88.14]:51485 helo=TX2EHSOBE007.bigfish.com) by eggs.gnu.org with esmtp (Exim 4.69) (envelope-from ) id 1OFN20-0005Ci-84 for qemu-devel@nongnu.org; Fri, 21 May 2010 03:52:33 -0400 Received: from mail63-tx2-R.bigfish.com (10.9.14.248) by TX2EHSOBE007.bigfish.com (10.9.40.27) with Microsoft SMTP Server id 8.1.340.0; Fri, 21 May 2010 07:52:24 +0000 Received: from mail63-tx2 (localhost.localdomain [127.0.0.1]) by mail63-tx2-R.bigfish.com (Postfix) with ESMTP id 3D01DA9023F; Fri, 21 May 2010 07:52:24 +0000 (UTC) X-SpamScore: -8 X-BigFish: VPS-8(zz936eM4015Lab9bhzz1202hzzz32i2a8h43h61h) Received: from mail63-tx2 (localhost.localdomain [127.0.0.1]) by mail63-tx2 (MessageSwitch) id 1274428343579371_6453; Fri, 21 May 2010 07:52:23 +0000 (UTC) Received: from TX2EHSMHS038.bigfish.com (unknown [10.9.14.235]) by mail63-tx2.bigfish.com (Postfix) with ESMTP id 895D05D004F; Fri, 21 May 2010 07:52:23 +0000 (UTC) Received: from ausb3extmailp01.amd.com (163.181.251.8) by TX2EHSMHS038.bigfish.com (10.9.99.138) with Microsoft SMTP Server (TLS) id 14.0.482.44; Fri, 21 May 2010 07:52:23 +0000 Received: from ausb3twp02.amd.com ([163.181.250.38]) by ausb3extmailp01.amd.com (Switch-3.2.7/Switch-3.2.7) with SMTP id o4L7dY9R003961; Fri, 21 May 2010 02:39:37 -0500 X-WSS-ID: 0L2RF6Z-02-E0Z-02 X-M-MSG: Received: from sausexhtp02.amd.com (sausexhtp02.amd.com [163.181.3.152]) (using TLSv1 with cipher RC4-MD5 (128/128 bits)) (No client certificate requested) by ausb3twp02.amd.com (Tumbleweed MailGate 3.7.2) with ESMTP id 21AECC8810; Fri, 21 May 2010 02:52:10 -0500 (CDT) Received: from storexhtp01.amd.com (172.24.4.3) by sausexhtp02.amd.com (163.181.3.152) with Microsoft SMTP Server (TLS) id 8.2.254.0; Fri, 21 May 2010 02:52:18 -0500 Received: from gwo.osrc.amd.com (165.204.16.204) by storexhtp01.amd.com (172.24.4.3) with Microsoft SMTP Server id 8.2.254.0; Fri, 21 May 2010 03:52:17 -0400 Received: from localhost.localdomain (tronje.osrc.amd.com [165.204.15.48]) by gwo.osrc.amd.com (Postfix) with ESMTP id 6E30B49C195; Fri, 21 May 2010 08:52:16 +0100 (BST) From: Andre Przywara To: Date: Fri, 21 May 2010 09:50:40 +0200 Message-ID: <1274428240-10801-1-git-send-email-andre.przywara@amd.com> X-Mailer: git-send-email 1.6.4 MIME-Version: 1.0 X-Reverse-DNS: unknown X-detected-operating-system: by eggs.gnu.org: Windows 2000 SP4, XP SP1+ Cc: Andre, Przywara , avi@redhat.com, aurelien@aurel32.net, qemu-devel@nongnu.org Subject: [Qemu-devel] [PATCH] resent: x86/cpuid: propagate further CPUID leafs when -cpu host X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org -cpu host currently only propagates the CPU's family/model/stepping, the brand name and the feature bits. Add a whitelist of safe CPUID leafs to let the guest see the actual CPU's cache details and other things. Signed-off-by: Andre Przywara --- target-i386/cpu.h | 6 +++++- target-i386/cpuid.c | 45 +++++++++++++++++++++++++++++++++++++-------- 2 files changed, 42 insertions(+), 9 deletions(-) Again this patch was not yet applied, without any discussion I can remember. Please apply. Thanks, Andre. diff --git a/target-i386/cpu.h b/target-i386/cpu.h index 548ab80..77cbbdb 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -581,6 +581,10 @@ typedef struct { #define NB_MMU_MODES 2 +#define CPUID_FLAGS_BUILTIN (1 << 0) +#define CPUID_FLAGS_VENDOR_OVERRIDE (1 << 1) +#define CPUID_FLAGS_HOST (1 << 2) + typedef struct CPUX86State { /* standard registers */ target_ulong regs[CPU_NB_REGS]; @@ -685,7 +689,7 @@ typedef struct CPUX86State { uint32_t cpuid_ext2_features; uint32_t cpuid_ext3_features; uint32_t cpuid_apic_id; - int cpuid_vendor_override; + uint32_t cpuid_flags; /* MTRRs */ uint64_t mtrr_fixed[11]; diff --git a/target-i386/cpuid.c b/target-i386/cpuid.c index 99d1f44..a80baa4 100644 --- a/target-i386/cpuid.c +++ b/target-i386/cpuid.c @@ -213,7 +213,6 @@ typedef struct x86_def_t { uint32_t features, ext_features, ext2_features, ext3_features, kvm_features; uint32_t xlevel; char model_id[48]; - int vendor_override; uint32_t flags; } x86_def_t; @@ -489,7 +488,7 @@ static int cpu_x86_fill_host(x86_def_t *x86_cpu_def) x86_cpu_def->ext2_features = edx; x86_cpu_def->ext3_features = ecx; cpu_x86_fill_model_id(x86_cpu_def->model_id); - x86_cpu_def->vendor_override = 0; + x86_cpu_def->flags = CPUID_FLAGS_HOST; return 0; } @@ -633,7 +632,7 @@ static int cpu_x86_find_by_name(x86_def_t *x86_cpu_def, const char *cpu_model) x86_cpu_def->vendor2 |= ((uint8_t)val[i + 4]) << (8 * i); x86_cpu_def->vendor3 |= ((uint8_t)val[i + 8]) << (8 * i); } - x86_cpu_def->vendor_override = 1; + x86_cpu_def->flags |= CPUID_FLAGS_VENDOR_OVERRIDE; } else if (!strcmp(featurestr, "model_id")) { pstrcpy(x86_cpu_def->model_id, sizeof(x86_cpu_def->model_id), val); @@ -731,7 +730,8 @@ void x86_cpu_list (FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...), return; } for (def = x86_defs; def; def = def->next) { - snprintf(buf, sizeof (buf), def->flags ? "[%s]": "%s", def->name); + snprintf(buf, sizeof (buf), + def->flags & CPUID_FLAGS_BUILTIN ? "[%s]": "%s", def->name); if (model || dump) { (*cpu_fprintf)(f, "x86 %16s %-48s\n", buf, def->model_id); } else { @@ -785,7 +785,7 @@ int cpu_x86_register (CPUX86State *env, const char *cpu_model) env->cpuid_vendor2 = CPUID_VENDOR_INTEL_2; env->cpuid_vendor3 = CPUID_VENDOR_INTEL_3; } - env->cpuid_vendor_override = def->vendor_override; + env->cpuid_flags = def->flags; env->cpuid_level = def->level; if (def->family > 0x0f) env->cpuid_version = 0xf00 | ((def->family - 0x0f) << 20); @@ -941,7 +941,7 @@ void x86_cpudef_setup(void) for (i = 0; i < ARRAY_SIZE(builtin_x86_defs); ++i) { builtin_x86_defs[i].next = x86_defs; - builtin_x86_defs[i].flags = 1; + builtin_x86_defs[i].flags |= CPUID_FLAGS_BUILTIN; x86_defs = &builtin_x86_defs[i]; } #if !defined(CONFIG_USER_ONLY) @@ -962,22 +962,51 @@ static void get_cpuid_vendor(CPUX86State *env, uint32_t *ebx, * this if you want to use KVM's sysenter/syscall emulation * in compatibility mode and when doing cross vendor migration */ - if (kvm_enabled() && ! env->cpuid_vendor_override) { + if (kvm_enabled() && + (env->cpuid_flags & CPUID_FLAGS_VENDOR_OVERRIDE) == 0) { host_cpuid(0, 0, NULL, ebx, ecx, edx); } } +/* safe CPUID leafs to propagate to guest if -cpu host is specified + * Intel defined leafs: + * Cache descriptors (0x02) + * Deterministic cache parameters (0x04) + * Monitor/MWAIT parameters (0x05) + */ +#define CPUID_LEAF_PROPAGATE ((1 << 0x02) | (1 << 0x04) | (1 << 0x05)) + +/* AMD defined leafs: + * L1 Cache and TLB (0x05) + * L2+L3 TLB (0x06) + * LongMode address size (0x08) + * 1GB page TLB (0x19) + * Performance optimization (0x1A) + */ +#define CPUID_LEAF_PROPAGATE_EXTENDED ((1 << 0x05) | (1 << 0x06) |\ + (1 << 0x08) | (1 << 0x19) | (1 << 0x1A)) + void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count, uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx) { - /* test if maximum index reached */ if (index & 0x80000000) { + /* test if maximum index reached */ if (index > env->cpuid_xlevel) index = env->cpuid_level; + if ((env->cpuid_flags & CPUID_FLAGS_HOST) && + ((1 << (index - 0x80000000)) & CPUID_LEAF_PROPAGATE_EXTENDED)) { + host_cpuid(index, count, eax, ebx, ecx, edx); + return; + } } else { if (index > env->cpuid_level) index = env->cpuid_level; + if ((env->cpuid_flags & CPUID_FLAGS_HOST) && + ((1 << index) & CPUID_LEAF_PROPAGATE)) { + host_cpuid(index, count, eax, ebx, ecx, edx); + return; + } } switch(index) {