From patchwork Thu May 6 15:50:43 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 51855 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id A9108B7D49 for ; Fri, 7 May 2010 03:46:22 +1000 (EST) Received: from localhost ([127.0.0.1]:43961 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1OA55g-00063o-7j for incoming@patchwork.ozlabs.org; Thu, 06 May 2010 13:42:28 -0400 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1OA51v-00062j-1c for qemu-devel@nongnu.org; Thu, 06 May 2010 13:38:35 -0400 Received: from [140.186.70.92] (port=51426 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1OA511-00056v-22 for qemu-devel@nongnu.org; Thu, 06 May 2010 13:38:34 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.69) (envelope-from ) id 1OA50R-0004nU-IF for qemu-devel@nongnu.org; Thu, 06 May 2010 13:37:16 -0400 Received: from are.twiddle.net ([75.149.56.221]:47609) by eggs.gnu.org with esmtp (Exim 4.69) (envelope-from ) id 1OA50R-0004mk-5a for qemu-devel@nongnu.org; Thu, 06 May 2010 13:37:03 -0400 Received: from anchor.twiddle.home (anchor.twiddle.home [172.31.0.4]) by are.twiddle.net (Postfix) with ESMTPS id E24501081; Thu, 6 May 2010 10:37:01 -0700 (PDT) Received: from anchor.twiddle.home (anchor.twiddle.home [127.0.0.1]) by anchor.twiddle.home (8.14.4/8.14.4) with ESMTP id o46Foltx002919; Thu, 6 May 2010 08:50:47 -0700 Received: (from rth@localhost) by anchor.twiddle.home (8.14.4/8.14.4/Submit) id o46FolAn002918; Thu, 6 May 2010 08:50:47 -0700 From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 6 May 2010 08:50:43 -0700 Message-Id: <1273161045-2880-4-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 1.7.0.1 In-Reply-To: <1273161045-2880-1-git-send-email-rth@twiddle.net> References: <1273161045-2880-1-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 2) Cc: aurelien@aurel32.net Subject: [Qemu-devel] [PATCH 3/5] tcg-ia64: Fix some register usage issues. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org (1) The output registers were not marked call-clobbered, even though they can be modified by called functions. (2) The thread pointer was not marked reserved. (3) R4-R6 are call-saved, but not saved by the prologue. Rather than save them, mark them reserved so that we don't use them. Signed-off-by: Richard Henderson --- tcg/ia64/tcg-target.c | 67 ++++++++++++++++++++++++++++++------------------ 1 files changed, 42 insertions(+), 25 deletions(-) diff --git a/tcg/ia64/tcg-target.c b/tcg/ia64/tcg-target.c index 401dfec..acd4ce8 100644 --- a/tcg/ia64/tcg-target.c +++ b/tcg/ia64/tcg-target.c @@ -2283,39 +2283,56 @@ void tcg_target_init(TCGContext *s) 0xffffffffffffffffull); tcg_regset_set(tcg_target_available_regs[TCG_TYPE_I64], 0xffffffffffffffffull); - tcg_regset_set(tcg_target_call_clobber_regs, - (1 << TCG_REG_R8) | - (1 << TCG_REG_R9) | - (1 << TCG_REG_R10) | - (1 << TCG_REG_R11) | - (1 << TCG_REG_R13) | - (1 << TCG_REG_R14) | - (1 << TCG_REG_R15) | - (1 << TCG_REG_R16) | - (1 << TCG_REG_R17) | - (1 << TCG_REG_R18) | - (1 << TCG_REG_R19) | - (1 << TCG_REG_R20) | - (1 << TCG_REG_R21) | - (1 << TCG_REG_R22) | - (1 << TCG_REG_R23) | - (1 << TCG_REG_R24) | - (1 << TCG_REG_R25) | - (1 << TCG_REG_R26) | - (1 << TCG_REG_R27) | - (1 << TCG_REG_R28) | - (1 << TCG_REG_R29) | - (1 << TCG_REG_R30) | - (1 << TCG_REG_R31)); - tcg_regset_clear(s->reserved_regs); + tcg_regset_clear(tcg_target_call_clobber_regs); + tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R8); + tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R9); + tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R10); + tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R11); + tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R14); + tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R15); + tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R16); + tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R17); + tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R18); + tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R19); + tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R20); + tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R21); + tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R22); + tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R23); + tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R24); + tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R25); + tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R26); + tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R27); + tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R28); + tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R29); + tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R30); + tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R31); + tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R56); + tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R57); + tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R58); + tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R59); + tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R60); + tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R61); + tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R62); + tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R63); + + tcg_regset_clear(s->reserved_regs); tcg_regset_set_reg(s->reserved_regs, TCG_REG_R0); /* zero register */ tcg_regset_set_reg(s->reserved_regs, TCG_REG_R1); /* global pointer */ tcg_regset_set_reg(s->reserved_regs, TCG_REG_R2); /* internal use */ tcg_regset_set_reg(s->reserved_regs, TCG_REG_R3); /* internal use */ tcg_regset_set_reg(s->reserved_regs, TCG_REG_R12); /* stack pointer */ + tcg_regset_set_reg(s->reserved_regs, TCG_REG_R13); /* thread pointer */ tcg_regset_set_reg(s->reserved_regs, TCG_REG_R32); /* return address */ tcg_regset_set_reg(s->reserved_regs, TCG_REG_R33); /* PFS */ + /* The following 3 are not in use, are call-saved, but *not* saved + by the prologue. Therefore we cannot use them without modifying + the prologue. There doesn't seem to be any good reason to use + these as opposed to the windowed registers. */ + tcg_regset_set_reg(s->reserved_regs, TCG_REG_R4); + tcg_regset_set_reg(s->reserved_regs, TCG_REG_R5); + tcg_regset_set_reg(s->reserved_regs, TCG_REG_R6); + tcg_add_target_add_op_defs(ia64_op_defs); }