From patchwork Sat Apr 10 01:32:54 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aurelien Jarno X-Patchwork-Id: 49887 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 881B7B7C48 for ; Sat, 10 Apr 2010 11:56:11 +1000 (EST) Received: from localhost ([127.0.0.1]:56768 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1O0Pvc-0004rH-JS for incoming@patchwork.ozlabs.org; Fri, 09 Apr 2010 21:56:08 -0400 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1O0PZt-0004ko-07 for qemu-devel@nongnu.org; Fri, 09 Apr 2010 21:33:41 -0400 Received: from [140.186.70.92] (port=49484 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1O0PZn-0004fz-Bb for qemu-devel@nongnu.org; Fri, 09 Apr 2010 21:33:40 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.69) (envelope-from ) id 1O0PZl-0007Ie-KN for qemu-devel@nongnu.org; Fri, 09 Apr 2010 21:33:35 -0400 Received: from hall.aurel32.net ([88.191.82.174]:35055) by eggs.gnu.org with esmtp (Exim 4.69) (envelope-from ) id 1O0PZk-0007I1-OV for qemu-devel@nongnu.org; Fri, 09 Apr 2010 21:33:33 -0400 Received: from [10.243.122.2] (helo=volta.aurel32.net) by hall.aurel32.net with esmtpsa (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.69) (envelope-from ) id 1O0PZj-0005Mi-UY; Sat, 10 Apr 2010 03:33:32 +0200 Received: from aurel32 by volta.aurel32.net with local (Exim 4.71) (envelope-from ) id 1O0PZT-0004kK-Ob; Sat, 10 Apr 2010 03:33:15 +0200 From: Aurelien Jarno To: qemu-devel@nongnu.org Date: Sat, 10 Apr 2010 03:32:54 +0200 Message-Id: <1270863186-10180-7-git-send-email-aurelien@aurel32.net> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: <1270863186-10180-1-git-send-email-aurelien@aurel32.net> References: <1270863186-10180-1-git-send-email-aurelien@aurel32.net> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 3) Cc: Andrzej Zaborowski , Aurelien Jarno Subject: [Qemu-devel] [PATCH v2 06/18] tcg/arm: add variables to define the allowed instructions set X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Use a set of variables to define the allowed ARM instructions, depending on the __ARM_ARCH_*__ GCC defines. v1 -> v2: - switch from #defines to variables - reorder and factorize definitions - add more architectures Signed-off-by: Aurelien Jarno --- tcg/arm/tcg-target.c | 123 ++++++++++++++++++++++++++++++++++---------------- 1 files changed, 84 insertions(+), 39 deletions(-) diff --git a/tcg/arm/tcg-target.c b/tcg/arm/tcg-target.c index ee5f723..2d834d6 100644 --- a/tcg/arm/tcg-target.c +++ b/tcg/arm/tcg-target.c @@ -22,6 +22,51 @@ * THE SOFTWARE. */ +#if defined(__ARM_ARCH_7__) || \ + defined(__ARM_ARCH_7A__) || \ + defined(__ARM_ARCH_7EM__) || \ + defined(__ARM_ARCH_7M__) || \ + defined(__ARM_ARCH_7R__) +#define USE_ARMV7_INSTRUCTIONS +#endif + +#if defined(USE_ARMV7_INSTRUCTIONS) || \ + defined(__ARM_ARCH_6J__) || \ + defined(__ARM_ARCH_6K__) || \ + defined(__ARM_ARCH_6Z__) || \ + defined(__ARM_ARCH_6ZK__) || \ + defined(__ARM_ARCH_T2__) +#define USE_ARMV6_INSTRUCTIONS +#endif + +#if defined(USE_ARMV6_INSTRUCTIONS) || \ + defined(__ARM_ARCH_5T__) || \ + defined(__ARM_ARCH_5TE__) || \ + defined(__ARM_ARCH_5TEJ__) +#define USE_ARMV5_INSTRUCTIONS +#endif + +#ifdef USE_ARMV5_INSTRUCTIONS +static const int use_armv5_instructions = 1; +#else +static const int use_armv5_instructions = 0; +#endif +#undef USE_ARMV5_INSTRUCTIONS + +#ifdef USE_ARMV6_INSTRUCTIONS +static const int use_armv6_instructions = 1; +#else +static const int use_armv6_instructions = 0; +#endif +#undef USE_ARMV6_INSTRUCTIONS + +#ifdef USE_ARMV7_INSTRUCTIONS +static const int use_armv7_instructions = 1; +#else +static const int use_armv7_instructions = 0; +#endif +#undef USE_ARMV7_INSTRUCTIONS + #ifndef NDEBUG static const char * const tcg_target_reg_names[TCG_TARGET_NB_REGS] = { "%r0", @@ -361,27 +406,27 @@ static inline void tcg_out_movi32(TCGContext *s, tcg_out_dat_imm(s, cond, ARITH_ADD, rd, 15, offset) : tcg_out_dat_imm(s, cond, ARITH_SUB, rd, 15, -offset); -#ifdef __ARM_ARCH_7A__ - /* use movw/movt */ - /* movw */ - tcg_out32(s, (cond << 28) | 0x03000000 | (rd << 12) - | ((arg << 4) & 0x000f0000) | (arg & 0xfff)); - if (arg & 0xffff0000) - /* movt */ - tcg_out32(s, (cond << 28) | 0x03400000 | (rd << 12) - | ((arg >> 12) & 0x000f0000) | ((arg >> 16) & 0xfff)); -#else - tcg_out_dat_imm(s, cond, ARITH_MOV, rd, 0, arg & 0xff); - if (arg & 0x0000ff00) - tcg_out_dat_imm(s, cond, ARITH_ORR, rd, rd, - ((arg >> 8) & 0xff) | 0xc00); - if (arg & 0x00ff0000) - tcg_out_dat_imm(s, cond, ARITH_ORR, rd, rd, - ((arg >> 16) & 0xff) | 0x800); - if (arg & 0xff000000) - tcg_out_dat_imm(s, cond, ARITH_ORR, rd, rd, - ((arg >> 24) & 0xff) | 0x400); -#endif + if (use_armv7_instructions) { + /* use movw/movt */ + /* movw */ + tcg_out32(s, (cond << 28) | 0x03000000 | (rd << 12) + | ((arg << 4) & 0x000f0000) | (arg & 0xfff)); + if (arg & 0xffff0000) + /* movt */ + tcg_out32(s, (cond << 28) | 0x03400000 | (rd << 12) + | ((arg >> 12) & 0x000f0000) | ((arg >> 16) & 0xfff)); + } else { + tcg_out_dat_imm(s, cond, ARITH_MOV, rd, 0, arg & 0xff); + if (arg & 0x0000ff00) + tcg_out_dat_imm(s, cond, ARITH_ORR, rd, rd, + ((arg >> 8) & 0xff) | 0xc00); + if (arg & 0x00ff0000) + tcg_out_dat_imm(s, cond, ARITH_ORR, rd, rd, + ((arg >> 16) & 0xff) | 0x800); + if (arg & 0xff000000) + tcg_out_dat_imm(s, cond, ARITH_ORR, rd, rd, + ((arg >> 24) & 0xff) | 0x400); + } } static inline void tcg_out_mul32(TCGContext *s, @@ -1433,26 +1478,26 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, break; case INDEX_op_ext8s_i32: -#ifdef __ARM_ARCH_7A__ - /* sxtb */ - tcg_out32(s, 0xe6af0070 | (args[0] << 12) | args[1]); -#else - tcg_out_dat_reg(s, COND_AL, ARITH_MOV, - args[0], 0, args[1], SHIFT_IMM_LSL(24)); - tcg_out_dat_reg(s, COND_AL, ARITH_MOV, - args[0], 0, args[0], SHIFT_IMM_ASR(24)); -#endif + if (use_armv7_instructions) { + /* sxtb */ + tcg_out32(s, 0xe6af0070 | (args[0] << 12) | args[1]); + } else { + tcg_out_dat_reg(s, COND_AL, ARITH_MOV, + args[0], 0, args[1], SHIFT_IMM_LSL(24)); + tcg_out_dat_reg(s, COND_AL, ARITH_MOV, + args[0], 0, args[0], SHIFT_IMM_ASR(24)); + } break; case INDEX_op_ext16s_i32: -#ifdef __ARM_ARCH_7A__ - /* sxth */ - tcg_out32(s, 0xe6bf0070 | (args[0] << 12) | args[1]); -#else - tcg_out_dat_reg(s, COND_AL, ARITH_MOV, - args[0], 0, args[1], SHIFT_IMM_LSL(16)); - tcg_out_dat_reg(s, COND_AL, ARITH_MOV, - args[0], 0, args[0], SHIFT_IMM_ASR(16)); -#endif + if (use_armv7_instructions) { + /* sxth */ + tcg_out32(s, 0xe6bf0070 | (args[0] << 12) | args[1]); + } else { + tcg_out_dat_reg(s, COND_AL, ARITH_MOV, + args[0], 0, args[1], SHIFT_IMM_LSL(16)); + tcg_out_dat_reg(s, COND_AL, ARITH_MOV, + args[0], 0, args[0], SHIFT_IMM_ASR(16)); + } break; default: