From patchwork Sun Jan 3 01:50:46 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Graf X-Patchwork-Id: 42031 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 80417B6EE9 for ; Sun, 3 Jan 2010 12:54:25 +1100 (EST) Received: from localhost ([127.0.0.1]:49908 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1NRFfi-0003iu-S1 for incoming@patchwork.ozlabs.org; Sat, 02 Jan 2010 20:54:22 -0500 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1NRFcS-0002b9-49 for qemu-devel@nongnu.org; Sat, 02 Jan 2010 20:51:00 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1NRFcN-0002ZN-BF for qemu-devel@nongnu.org; Sat, 02 Jan 2010 20:50:59 -0500 Received: from [199.232.76.173] (port=45270 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1NRFcN-0002ZG-6L for qemu-devel@nongnu.org; Sat, 02 Jan 2010 20:50:55 -0500 Received: from cantor2.suse.de ([195.135.220.15]:42609 helo=mx2.suse.de) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1NRFcM-0007Yq-FP for qemu-devel@nongnu.org; Sat, 02 Jan 2010 20:50:54 -0500 Received: from relay2.suse.de (charybdis-ext.suse.de [195.135.221.2]) by mx2.suse.de (Postfix) with ESMTP id EFF0C8891E; Sun, 3 Jan 2010 02:50:50 +0100 (CET) From: Alexander Graf To: QEMU Developers Date: Sun, 3 Jan 2010 02:50:46 +0100 Message-Id: <1262483450-15206-3-git-send-email-agraf@suse.de> X-Mailer: git-send-email 1.6.0.2 In-Reply-To: <1262483450-15206-1-git-send-email-agraf@suse.de> References: <1262483450-15206-1-git-send-email-agraf@suse.de> X-detected-operating-system: by monty-python.gnu.org: GNU/Linux 2.4-2.6 Cc: Blue Swirl , Aurelien Jarno Subject: [Qemu-devel] [PATCH 2/6] Add config space conversion function for uni_north X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org As stated in the previous patch, the Uninorth PCI bridge requires different layouts in its PCI config space accessors. This patch introduces a conversion function that makes it compatible with the way Linux accesses it. I also kept an OpenBIOS compatibility hack in. I think it'd be better to take small steps here and do the config space access rework in OpenBIOS later on. When that's done we can remove that hack. Signed-off-by: Alexander Graf --- hw/unin_pci.c | 35 +++++++++++++++++++++++++++++++++++ 1 files changed, 35 insertions(+), 0 deletions(-) diff --git a/hw/unin_pci.c b/hw/unin_pci.c index fdb9401..1c49008 100644 --- a/hw/unin_pci.c +++ b/hw/unin_pci.c @@ -75,6 +75,40 @@ static void pci_unin_reset(void *opaque) { } +static uint32_t unin_get_config_reg(PCIHostState *s, uint32_t addr) +{ + uint32_t retval; + uint32_t reg = s->config_reg; + + if (reg & (1u << 31)) { + /* XXX OpenBIOS compatibility hack */ + retval = reg; + addr |= reg & 7; + } else if (reg & 1) { + /* Set upper valid bit and remove lower one */ + retval = (reg & ~3u) | (1u << 31); + } else { + uint32_t slot, func; + uint32_t devfn; + + /* Grab CFA0 style values */ + slot = ffs(reg & 0xfffff800) - 1; + func = (reg >> 8) & 7; + devfn = PCI_DEVFN(slot, func); + + /* ... and then convert them to x86 format */ + retval = (reg & 0xfc) | (devfn << 8) | (1u << 31); + } + + retval &= ~3u; + retval |= (addr & 7); + + UNIN_DPRINTF("Converted config space accessor %08x/%08x -> %08x\n", + reg, addr, retval); + + return retval; +} + static int pci_unin_main_init_device(SysBusDevice *dev) { UNINState *s; @@ -85,6 +119,7 @@ static int pci_unin_main_init_device(SysBusDevice *dev) s = FROM_SYSBUS(UNINState, dev); pci_host_init(&s->host_state); + s->host_state.get_config_reg = unin_get_config_reg; pci_mem_config = pci_host_conf_register_mmio(&s->host_state); pci_mem_data = pci_host_data_register_mmio(&s->host_state); sysbus_init_mmio(dev, 0x1000, pci_mem_config);