From patchwork Mon Nov 16 17:12:03 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Glauber Costa X-Patchwork-Id: 38528 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id D6051B7B65 for ; Tue, 17 Nov 2009 04:49:34 +1100 (EST) Received: from localhost ([127.0.0.1]:57976 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1NA5hi-0005gI-QB for incoming@patchwork.ozlabs.org; Mon, 16 Nov 2009 12:49:30 -0500 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1NA57n-0007dm-Fe for qemu-devel@nongnu.org; Mon, 16 Nov 2009 12:12:25 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1NA57h-0007aL-EV for qemu-devel@nongnu.org; Mon, 16 Nov 2009 12:12:22 -0500 Received: from [199.232.76.173] (port=36104 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1NA57g-0007a0-W3 for qemu-devel@nongnu.org; Mon, 16 Nov 2009 12:12:17 -0500 Received: from mx1.redhat.com ([209.132.183.28]:8437) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1NA57g-0005aK-Ju for qemu-devel@nongnu.org; Mon, 16 Nov 2009 12:12:16 -0500 Received: from int-mx04.intmail.prod.int.phx2.redhat.com (int-mx04.intmail.prod.int.phx2.redhat.com [10.5.11.17]) by mx1.redhat.com (8.13.8/8.13.8) with ESMTP id nAGHCFfN000616 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Mon, 16 Nov 2009 12:12:15 -0500 Received: from localhost.localdomain (ovpn01.gateway.prod.ext.phx2.redhat.com [10.5.9.1]) by int-mx04.intmail.prod.int.phx2.redhat.com (8.13.8/8.13.8) with ESMTP id nAGHC7M9010655; Mon, 16 Nov 2009 12:12:14 -0500 From: Glauber Costa To: qemu-devel@nongnu.org Date: Mon, 16 Nov 2009 15:12:03 -0200 Message-Id: <1258391527-18840-6-git-send-email-glommer@redhat.com> In-Reply-To: <1258391527-18840-5-git-send-email-glommer@redhat.com> References: <1258391527-18840-1-git-send-email-glommer@redhat.com> <1258391527-18840-2-git-send-email-glommer@redhat.com> <1258391527-18840-3-git-send-email-glommer@redhat.com> <1258391527-18840-4-git-send-email-glommer@redhat.com> <1258391527-18840-5-git-send-email-glommer@redhat.com> X-Scanned-By: MIMEDefang 2.67 on 10.5.11.17 X-detected-operating-system: by monty-python.gnu.org: Genre and OS details not recognized. Cc: aliguori@us.ibm.com Subject: [Qemu-devel] [PATCH v2 5/9] Don't call apic functions directly from kvm code X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org It is actually not necessary to call a tpr function to save and load cr8, as cr8 is part of the processor state, and thus, it is much easier to just add it to CPUState. As for apic base, wrap kvm usages, so we can call either the qemu device, or the in kernel version. Signed-off-by: Glauber Costa --- target-i386/cpu.h | 1 + target-i386/kvm.c | 25 +++++++++++++++++++------ 2 files changed, 20 insertions(+), 6 deletions(-) diff --git a/target-i386/cpu.h b/target-i386/cpu.h index 5929d28..e5470f7 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -606,6 +606,7 @@ typedef struct CPUX86State { SegmentCache idt; /* only base and limit are used */ target_ulong cr[5]; /* NOTE: cr1 is unused */ + target_ulong cr8; int32_t a20_mask; /* FPU state */ diff --git a/target-i386/kvm.c b/target-i386/kvm.c index 6613a3f..103defd 100644 --- a/target-i386/kvm.c +++ b/target-i386/kvm.c @@ -338,6 +338,19 @@ static void get_seg(SegmentCache *lhs, const struct kvm_segment *rhs) | (rhs->avl * DESC_AVL_MASK); } +static void kvm_set_apic_base(CPUState *env, uint64_t val) +{ + if (!kvm_irqchip_in_kernel()) + cpu_set_apic_base(env, val); +} + +static uint64_t kvm_get_apic_base(CPUState *env) +{ + if (!kvm_irqchip_in_kernel()) + return cpu_get_apic_base(env); + return 0; +} + static void kvm_getput_reg(__u64 *kvm_reg, target_ulong *qemu_reg, int set) { if (set) @@ -447,8 +460,8 @@ static int kvm_put_sregs(CPUState *env) sregs.cr3 = env->cr[3]; sregs.cr4 = env->cr[4]; - sregs.cr8 = cpu_get_apic_tpr(env); - sregs.apic_base = cpu_get_apic_base(env); + sregs.cr8 = env->cr8; + sregs.apic_base = kvm_get_apic_base(env); sregs.efer = env->efer; @@ -546,7 +559,7 @@ static int kvm_get_sregs(CPUState *env) env->cr[3] = sregs.cr3; env->cr[4] = sregs.cr4; - cpu_set_apic_base(env, sregs.apic_base); + kvm_set_apic_base(env, sregs.apic_base); env->efer = sregs.efer; //cpu_set_apic_tpr(env, sregs.cr8); @@ -762,7 +775,7 @@ int kvm_arch_pre_run(CPUState *env, struct kvm_run *run) run->request_interrupt_window = 0; dprintf("setting tpr\n"); - run->cr8 = cpu_get_apic_tpr(env); + run->cr8 = env->cr8; return 0; } @@ -774,8 +787,8 @@ int kvm_arch_post_run(CPUState *env, struct kvm_run *run) else env->eflags &= ~IF_MASK; - cpu_set_apic_tpr(env, run->cr8); - cpu_set_apic_base(env, run->apic_base); + env->cr8 = run->cr8; + kvm_set_apic_base(env, run->apic_base); return 0; }