From patchwork Fri Oct 9 06:28:35 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Isaku Yamahata X-Patchwork-Id: 35554 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 6B629B7B74 for ; Fri, 9 Oct 2009 17:31:52 +1100 (EST) Received: from localhost ([127.0.0.1]:59469 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Mw913-00042y-7O for incoming@patchwork.ozlabs.org; Fri, 09 Oct 2009 02:31:49 -0400 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1Mw909-0003yG-W2 for qemu-devel@nongnu.org; Fri, 09 Oct 2009 02:30:54 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1Mw903-0003oa-Ge for qemu-devel@nongnu.org; Fri, 09 Oct 2009 02:30:51 -0400 Received: from [199.232.76.173] (port=55743 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Mw903-0003oF-BW for qemu-devel@nongnu.org; Fri, 09 Oct 2009 02:30:47 -0400 Received: from mail.valinux.co.jp ([210.128.90.3]:36120) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1Mw901-0001OK-Ol for qemu-devel@nongnu.org; Fri, 09 Oct 2009 02:30:46 -0400 Received: from nm.local.valinux.co.jp (vagw.valinux.co.jp [210.128.90.14]) by mail.valinux.co.jp (Postfix) with ESMTP id 8041449E04; Fri, 9 Oct 2009 15:30:39 +0900 (JST) Received: from yamahata by nm.local.valinux.co.jp with local (Exim 4.69) (envelope-from ) id 1Mw8yM-000466-7d; Fri, 09 Oct 2009 15:29:02 +0900 From: Isaku Yamahata To: qemu-devel@nongnu.org, mst@redhat.com Date: Fri, 9 Oct 2009 15:28:35 +0900 Message-Id: <1255069742-15724-3-git-send-email-yamahata@valinux.co.jp> X-Mailer: git-send-email 1.6.0.2 In-Reply-To: <1255069742-15724-1-git-send-email-yamahata@valinux.co.jp> References: <1255069742-15724-1-git-send-email-yamahata@valinux.co.jp> X-Virus-Scanned: clamav-milter 0.95.2 at va-mail.local.valinux.co.jp X-Virus-Status: Clean X-detected-operating-system: by monty-python.gnu.org: GNU/Linux 2.6 (newer, 3) Cc: yamahata@valinux.co.jp Subject: [Qemu-devel] [PATCH V5 02/29] pci: introduce constant PCI_NUM_PINS for the number of interrupt pins, 4. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org introduce constant PCI_NUM_PINS for the number of interrupt pins, 4. and use it. Signed-off-by: Isaku Yamahata Acked-by: Michael S. Tsirkin --- hw/pci.c | 4 ++-- hw/pci.h | 4 +++- 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/hw/pci.c b/hw/pci.c index 9fd2c38..9b145ee 100644 --- a/hw/pci.c +++ b/hw/pci.c @@ -229,7 +229,7 @@ const VMStateDescription vmstate_pci_device = { VMSTATE_INT32_LE(version_id, PCIDevice), VMSTATE_SINGLE(config, PCIDevice, 0, vmstate_info_pci_config, typeof_field(PCIDevice,config)), - VMSTATE_INT32_ARRAY_V(irq_state, PCIDevice, 4, 2), + VMSTATE_INT32_ARRAY_V(irq_state, PCIDevice, PCI_NUM_PINS, 2), VMSTATE_END_OF_LIST() } }; @@ -389,7 +389,7 @@ static PCIDevice *do_pci_register_device(PCIDevice *pci_dev, PCIBus *bus, pci_dev->config_read = config_read; pci_dev->config_write = config_write; bus->devices[devfn] = pci_dev; - pci_dev->irq = qemu_allocate_irqs(pci_set_irq, pci_dev, 4); + pci_dev->irq = qemu_allocate_irqs(pci_set_irq, pci_dev, PCI_NUM_PINS); pci_dev->version_id = 2; /* Current pci device vmstate version */ return pci_dev; } diff --git a/hw/pci.h b/hw/pci.h index 93f93fb..476ff59 100644 --- a/hw/pci.h +++ b/hw/pci.h @@ -158,6 +158,8 @@ typedef struct PCIIORegion { /* Size of the standard PCI config space */ #define PCI_CONFIG_SPACE_SIZE 0x100 +#define PCI_NUM_PINS 4 /* A-D */ + /* Bits in cap_present field. */ enum { QEMU_PCI_CAP_MSIX = 0x1, @@ -192,7 +194,7 @@ struct PCIDevice { qemu_irq *irq; /* Current IRQ levels. Used internally by the generic PCI code. */ - int irq_state[4]; + int irq_state[PCI_NUM_PINS]; /* Capability bits */ uint32_t cap_present;