Message ID | 1253274494-13244-22-git-send-email-andre.przywara@amd.com |
---|---|
State | Superseded |
Headers | show |
diff --git a/target-i386/cpuid.c b/target-i386/cpuid.c index 505fca5..9d687fd 100644 --- a/target-i386/cpuid.c +++ b/target-i386/cpuid.c @@ -145,7 +145,6 @@ typedef struct x86_def_t { #define TCG_EXT3_FEATURES (CPUID_EXT3_LAHF_LM | CPUID_EXT3_SVM) static x86_def_t x86_defs[] = { -#ifdef TARGET_X86_64 { .name = "qemu64", .level = 4, @@ -239,7 +238,6 @@ static x86_def_t x86_defs[] = { .xlevel = 0x80000008, .model_id = "Common KVM processor" }, -#endif { .name = "qemu32", .level = 4,
Since 64-bit capability is just another CPUID bit we now properly mask, there is no reason anymore to hide the 64-bit capable CPU models from a 32-bit only QEMU. All 64-bit CPUs can be used perfectly in 32-bit legacy mode anyway, so these models also make sense for 32-bit. Signed-off-by: Andre Przywara <andre.przywara@amd.com> --- target-i386/cpuid.c | 2 -- 1 files changed, 0 insertions(+), 2 deletions(-)