From patchwork Thu Jan 3 16:27:24 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: BALATON Zoltan X-Patchwork-Id: 1020405 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=208.118.235.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=eik.bme.hu Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 43Vv0G249Sz9s9G for ; Fri, 4 Jan 2019 03:44:46 +1100 (AEDT) Received: from localhost ([127.0.0.1]:55947 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gf66u-0002FX-4T for incoming@patchwork.ozlabs.org; Thu, 03 Jan 2019 11:44:44 -0500 Received: from eggs.gnu.org ([208.118.235.92]:58451) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gf65B-0000jI-6D for qemu-devel@nongnu.org; Thu, 03 Jan 2019 11:42:58 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gf656-0007hV-DY for qemu-devel@nongnu.org; Thu, 03 Jan 2019 11:42:57 -0500 Received: from zero.eik.bme.hu ([152.66.115.2]:18122) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gf656-0007d1-0J; Thu, 03 Jan 2019 11:42:52 -0500 Received: from zero.eik.bme.hu (blah.eik.bme.hu [152.66.115.182]) by localhost (Postfix) with SMTP id C09987456B3; Thu, 3 Jan 2019 17:42:50 +0100 (CET) Received: by zero.eik.bme.hu (Postfix, from userid 432) id 5211B7456B5; Thu, 3 Jan 2019 17:42:50 +0100 (CET) Message-Id: <0fe1ed9a6a7c7f3c2156ed14cc4c53bf439702a8.1546532844.git.balaton@eik.bme.hu> In-Reply-To: References: From: BALATON Zoltan Date: Thu, 03 Jan 2019 17:27:24 +0100 To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org X-detected-operating-system: by eggs.gnu.org: FreeBSD 9.x [fuzzy] X-Received-From: 152.66.115.2 Subject: [Qemu-devel] [PATCH v3 6/6] sam460ex: Fix support for memory larger than 1GB X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: David Gibson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Fix the encoding of larger memory modules in the SoC registers which allows specifying more than 1GB memory for sam460ex. Well, only 2GB due to SoC and firmware restrictions which was the only missing value compared to what the real hardware supports. The SoC should support up to 4GB but when setting that the firmware hangs during memory test. This may be an overflow bug in the firmware which I did not try to debug but this may affect real hardware as well. Signed-off-by: BALATON Zoltan --- v2: lower case hex constants to match others around it hw/ppc/ppc440_uc.c | 22 ++++++++++++---------- hw/ppc/sam460ex.c | 6 ++++-- 2 files changed, 16 insertions(+), 12 deletions(-) diff --git a/hw/ppc/ppc440_uc.c b/hw/ppc/ppc440_uc.c index 60dbb35eee..c489368905 100644 --- a/hw/ppc/ppc440_uc.c +++ b/hw/ppc/ppc440_uc.c @@ -2,7 +2,7 @@ * QEMU PowerPC 440 embedded processors emulation * * Copyright (c) 2012 François Revol - * Copyright (c) 2016-2018 BALATON Zoltan + * Copyright (c) 2016-2019 BALATON Zoltan * * This work is licensed under the GNU GPL license version 2 or later. * @@ -505,10 +505,6 @@ enum { SDRAM_PLBADDUHB = 0x50, }; -/* XXX: TOFIX: some patches have made this code become inconsistent: - * there are type inconsistencies, mixing hwaddr, target_ulong - * and uint32_t - */ static uint32_t sdram_bcr(hwaddr ram_base, hwaddr ram_size) { uint32_t bcr; @@ -538,11 +534,17 @@ static uint32_t sdram_bcr(hwaddr ram_base, hwaddr ram_size) case (1 * GiB): bcr = 0xe000; break; + case (2 * GiB): + bcr = 0xc000; + break; + case (4 * GiB): + bcr = 0x8000; + break; default: error_report("invalid RAM size " TARGET_FMT_plx, ram_size); return 0; } - bcr |= ram_base & 0xFF800000; + bcr |= ram_base >> 2 & 0xffe00000; bcr |= 1; return bcr; @@ -550,12 +552,12 @@ static uint32_t sdram_bcr(hwaddr ram_base, hwaddr ram_size) static inline hwaddr sdram_base(uint32_t bcr) { - return bcr & 0xFF800000; + return (bcr & 0xffe00000) << 2; } -static target_ulong sdram_size(uint32_t bcr) +static uint64_t sdram_size(uint32_t bcr) { - target_ulong size; + uint64_t size; int sh; sh = 1024 - ((bcr >> 6) & 0x3ff); @@ -575,7 +577,7 @@ static void sdram_set_bcr(ppc440_sdram_t *sdram, int i, &sdram->ram_memories[i]); object_unparent(OBJECT(&sdram->containers[i])); } - sdram->bcr[i] = bcr & 0xFFDEE001; + sdram->bcr[i] = bcr & 0xffe0ffc1; if (enabled && (bcr & 1)) { memory_region_init(&sdram->containers[i], NULL, "sdram-containers", sdram_size(bcr)); diff --git a/hw/ppc/sam460ex.c b/hw/ppc/sam460ex.c index 233f81bb56..ac575be813 100644 --- a/hw/ppc/sam460ex.c +++ b/hw/ppc/sam460ex.c @@ -76,9 +76,11 @@ #define UART_FREQ 11059200 #define SDRAM_NR_BANKS 4 -/* FIXME: See u-boot.git 8ac41e, also fix in ppc440_uc.c */ +/* The SoC could also handle 4 GiB but firmware does not work with that. */ +/* Maybe it overflows a signed 32 bit number somewhere? */ static const ram_addr_t ppc460ex_sdram_bank_sizes[] = { - 1 * GiB, 512 * MiB, 256 * MiB, 128 * MiB, 64 * MiB, 32 * MiB, 0 + 2 * GiB, 1 * GiB, 512 * MiB, 256 * MiB, 128 * MiB, 64 * MiB, + 32 * MiB, 0 }; struct boot_info {