diff mbox

linux-user: Fix MIPS N64 trap and break instruction bug

Message ID 0DA23CC379F5F945ACB41CF394B98277210E9658@LEMAIL01.le.imgtec.org
State New
Headers show

Commit Message

Andrew Bennett June 29, 2015, 10:20 a.m. UTC 
From: Andrew Bennett <andrew.bennett@imgtec.com>

For the MIPS N64 ABI when QEMU reads the break/trap instruction so that
it can inspect the break/trap code it reads 8 rather than 4 bytes
which means it finds the code field from the instruction after the 
break/trap instruction.  This then causes the break/trap handling
code to fail because it does not understand the code number.

The fix forces QEMU to always read 4 bytes of instruction data rather
than deciding how much to read based on the ABI.

Signed-off-by: Andrew Bennett <andrew.bennett@imgtec.com>
---
 linux-user/main.c |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

Comments

Leon Alrae June 30, 2015, 1:18 p.m. UTC | #1 
On 29/06/2015 11:20, Andrew Bennett wrote:
> From: Andrew Bennett <andrew.bennett@imgtec.com>
> 
> For the MIPS N64 ABI when QEMU reads the break/trap instruction so that
> it can inspect the break/trap code it reads 8 rather than 4 bytes
> which means it finds the code field from the instruction after the 
> break/trap instruction.  This then causes the break/trap handling
> code to fail because it does not understand the code number.
> 
> The fix forces QEMU to always read 4 bytes of instruction data rather
> than deciding how much to read based on the ABI.
> 
> Signed-off-by: Andrew Bennett <andrew.bennett@imgtec.com>
> ---
>  linux-user/main.c |    4 ++--
>  1 files changed, 2 insertions(+), 2 deletions(-)

Reviewed-by: Leon Alrae <leon.alrae@imgtec.com>

Thanks,
Leon
Leon Alrae July 15, 2015, 3:54 p.m. UTC | #2 
On 30/06/2015 14:18, Leon Alrae wrote:
> On 29/06/2015 11:20, Andrew Bennett wrote:
>> From: Andrew Bennett <andrew.bennett@imgtec.com>
>>
>> For the MIPS N64 ABI when QEMU reads the break/trap instruction so that
>> it can inspect the break/trap code it reads 8 rather than 4 bytes
>> which means it finds the code field from the instruction after the 
>> break/trap instruction.  This then causes the break/trap handling
>> code to fail because it does not understand the code number.
>>
>> The fix forces QEMU to always read 4 bytes of instruction data rather
>> than deciding how much to read based on the ABI.
>>
>> Signed-off-by: Andrew Bennett <andrew.bennett@imgtec.com>
>> ---
>>  linux-user/main.c |    4 ++--
>>  1 files changed, 2 insertions(+), 2 deletions(-)
> 
> Reviewed-by: Leon Alrae <leon.alrae@imgtec.com>

Riku, I'm including this patch in target-mips queue which I'm going to send
out soon for rc1. If you have any objections please let me know.

Thanks,
Leon
diff mbox

Patch

diff --git a/linux-user/main.c b/linux-user/main.c
index c855bcc..2f8f3e6 100644
--- a/linux-user/main.c
+++ b/linux-user/main.c
@@ -2578,7 +2578,7 @@  done_syscall:
                         code = (trap_instr >> 6) & 0x3f;
                     }
                 } else {
-                    ret = get_user_ual(trap_instr, env->active_tc.PC);
+                    ret = get_user_u32(trap_instr, env->active_tc.PC);
                     if (ret != 0) {
                         goto error;
                     }
@@ -2612,7 +2612,7 @@  done_syscall:
 
                     trap_instr = (instr[0] << 16) | instr[1];
                 } else {
-                    ret = get_user_ual(trap_instr, env->active_tc.PC);
+                    ret = get_user_u32(trap_instr, env->active_tc.PC);
                 }
 
                 if (ret != 0) {