From patchwork Mon Sep 2 16:43:30 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jan Kiszka X-Patchwork-Id: 272011 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 48BA22C0082 for ; Tue, 3 Sep 2013 02:44:21 +1000 (EST) Received: from localhost ([::1]:41088 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VGXEh-0006dW-9c for incoming@patchwork.ozlabs.org; Mon, 02 Sep 2013 12:44:19 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44226) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VGXEE-0006UQ-3S for qemu-devel@nongnu.org; Mon, 02 Sep 2013 12:43:56 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VGXE1-0002Ej-KK for qemu-devel@nongnu.org; Mon, 02 Sep 2013 12:43:50 -0400 Received: from david.siemens.de ([192.35.17.14]:17744) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VGXE1-0002EE-A0; Mon, 02 Sep 2013 12:43:37 -0400 Received: from mail1.siemens.de (localhost [127.0.0.1]) by david.siemens.de (8.13.6/8.13.6) with ESMTP id r82GhWGF030509; Mon, 2 Sep 2013 18:43:32 +0200 Received: from mchn199C.mchp.siemens.de.de ([139.25.40.156]) by mail1.siemens.de (8.13.6/8.13.6) with ESMTP id r82GhW4L009364; Mon, 2 Sep 2013 18:43:32 +0200 From: Jan Kiszka To: qemu-devel , Anthony Liguori Date: Mon, 2 Sep 2013 18:43:30 +0200 Message-Id: <07d40345e08f45d1297f7d8992a565ca7ca2030b.1378140210.git.jan.kiszka@siemens.com> X-Mailer: git-send-email 1.8.1.1.298.ge7eed54 In-Reply-To: References: In-Reply-To: References: X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.4.x X-Received-From: 192.35.17.14 Cc: Paolo Bonzini , qemu-stable@nongnu.org, =?UTF-8?q?Andreas=20F=C3=A4rber?= , Peter Maydell Subject: [Qemu-devel] [PATCH v3 1/2] memory: Provide separate handling of unassigned io ports accesses X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Accesses to unassigned io ports shall return -1 on read and be ignored on write. Ensure these properties via dedicated ops, decoupling us from the memory core's handling of unassigned accesses. Signed-off-by: Jan Kiszka --- exec.c | 3 ++- include/exec/ioport.h | 4 ++++ ioport.c | 16 ++++++++++++++++ 3 files changed, 22 insertions(+), 1 deletion(-) diff --git a/exec.c b/exec.c index 3ca9381..9ed598f 100644 --- a/exec.c +++ b/exec.c @@ -1820,7 +1820,8 @@ static void memory_map_init(void) address_space_init(&address_space_memory, system_memory, "memory"); system_io = g_malloc(sizeof(*system_io)); - memory_region_init(system_io, NULL, "io", 65536); + memory_region_init_io(system_io, NULL, &unassigned_io_ops, NULL, "io", + 65536); address_space_init(&address_space_io, system_io, "I/O"); memory_listener_register(&core_memory_listener, &address_space_memory); diff --git a/include/exec/ioport.h b/include/exec/ioport.h index bdd4e96..b3848be 100644 --- a/include/exec/ioport.h +++ b/include/exec/ioport.h @@ -45,6 +45,10 @@ typedef struct MemoryRegionPortio { #define PORTIO_END_OF_LIST() { } +#ifndef CONFIG_USER_ONLY +extern const MemoryRegionOps unassigned_io_ops; +#endif + void cpu_outb(pio_addr_t addr, uint8_t val); void cpu_outw(pio_addr_t addr, uint16_t val); void cpu_outl(pio_addr_t addr, uint32_t val); diff --git a/ioport.c b/ioport.c index 79b7f1a..707cce8 100644 --- a/ioport.c +++ b/ioport.c @@ -44,6 +44,22 @@ typedef struct MemoryRegionPortioList { MemoryRegionPortio ports[]; } MemoryRegionPortioList; +static uint64_t unassigned_io_read(void *opaque, hwaddr addr, unsigned size) +{ + return -1ULL; +} + +static void unassigned_io_write(void *opaque, hwaddr addr, uint64_t val, + unsigned size) +{ +} + +const MemoryRegionOps unassigned_io_ops = { + .read = unassigned_io_read, + .write = unassigned_io_write, + .endianness = DEVICE_NATIVE_ENDIAN, +}; + void cpu_outb(pio_addr_t addr, uint8_t val) { LOG_IOPORT("outb: %04"FMT_pioaddr" %02"PRIx8"\n", addr, val);