From patchwork Fri May 14 07:29:22 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Isaku Yamahata X-Patchwork-Id: 52584 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id E8186B7E87 for ; Fri, 14 May 2010 18:22:19 +1000 (EST) Received: from localhost ([127.0.0.1]:58543 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1OCq9w-0003I6-3A for incoming@patchwork.ozlabs.org; Fri, 14 May 2010 04:22:16 -0400 Received: from [140.186.70.92] (port=56221 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1OCq86-0002pJ-I9 for qemu-devel@nongnu.org; Fri, 14 May 2010 04:20:27 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.69) (envelope-from ) id 1OCq81-0000z2-20 for qemu-devel@nongnu.org; Fri, 14 May 2010 04:20:22 -0400 Received: from mail.valinux.co.jp ([210.128.90.3]:37531) by eggs.gnu.org with esmtp (Exim 4.69) (envelope-from ) id 1OCpO2-0002fN-1d for qemu-devel@nongnu.org; Fri, 14 May 2010 03:32:47 -0400 Received: from ps.local.valinux.co.jp (vagw.valinux.co.jp [210.128.90.14]) by mail.valinux.co.jp (Postfix) with SMTP id 970E010715B; Fri, 14 May 2010 16:32:38 +0900 (JST) Received: (nullmailer pid 28017 invoked by uid 1000); Fri, 14 May 2010 07:29:25 -0000 From: Isaku Yamahata To: qemu-devel@nongnu.org Date: Fri, 14 May 2010 16:29:22 +0900 Message-Id: <07732d5a952b0693eb85d379be26a7a73fffe075.1273821065.git.yamahata@valinux.co.jp> X-Mailer: git-send-email 1.6.6.1 In-Reply-To: References: In-Reply-To: References: X-Virus-Scanned: clamav-milter 0.95.2 at va-mail.local.valinux.co.jp X-Virus-Status: Clean X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 3) Cc: blauwirbel@gmail.com, yamahata@valinux.co.jp, kraxel@redhat.com Subject: [Qemu-devel] [PATCH 24/26] acpi_piix4: remove #ifdef DEBUG. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org removed #ifdef DEBUG by using macro. Signed-off-by: Isaku Yamahata Acked-by: Gerd Hoffmann --- hw/acpi_piix4.c | 55 ++++++++++++++++++------------------------------------- 1 files changed, 18 insertions(+), 37 deletions(-) diff --git a/hw/acpi_piix4.c b/hw/acpi_piix4.c index bb3d094..fdef697 100644 --- a/hw/acpi_piix4.c +++ b/hw/acpi_piix4.c @@ -27,6 +27,12 @@ //#define DEBUG +#ifdef DEBUG +# define PIIX4_DPRINTF(format, ...) printf(format, ## __VA_ARGS__) +#else +# define PIIX4_DPRINTF(format, ...) do { } while (0) +#endif + #define ACPI_DBG_IO_ADDR 0xb044 #define GPE_BASE 0xafe0 @@ -172,9 +178,7 @@ static void pm_ioport_writew(void *opaque, uint32_t addr, uint32_t val) default: break; } -#ifdef DEBUG - printf("PM writew port=0x%04x val=0x%04x\n", addr, val); -#endif + PIIX4_DPRINTF("PM writew port=0x%04x val=0x%04x\n", addr, val); } static uint32_t pm_ioport_readw(void *opaque, uint32_t addr) @@ -197,19 +201,14 @@ static uint32_t pm_ioport_readw(void *opaque, uint32_t addr) val = 0; break; } -#ifdef DEBUG - printf("PM readw port=0x%04x val=0x%04x\n", addr, val); -#endif + PIIX4_DPRINTF("PM readw port=0x%04x val=0x%04x\n", addr, val); return val; } static void pm_ioport_writel(void *opaque, uint32_t addr, uint32_t val) { // PIIX4PMState *s = opaque; -#ifdef DEBUG - addr &= 0x3f; - printf("PM writel port=0x%04x val=0x%08x\n", addr, val); -#endif + PIIX4_DPRINTF("PM writel port=0x%04x val=0x%08x\n", addr & 0x3f, val); } static uint32_t pm_ioport_readl(void *opaque, uint32_t addr) @@ -226,9 +225,7 @@ static uint32_t pm_ioport_readl(void *opaque, uint32_t addr) val = 0; break; } -#ifdef DEBUG - printf("PM readl port=0x%04x val=0x%08x\n", addr, val); -#endif + PIIX4_DPRINTF("PM readl port=0x%04x val=0x%08x\n", addr, val); return val; } @@ -252,9 +249,7 @@ static void apm_ctrl_changed(uint32_t val, void *arg) static void acpi_dbg_writel(void *opaque, uint32_t addr, uint32_t val) { -#if defined(DEBUG) - printf("ACPI: DBG: 0x%08x\n", val); -#endif + PIIX4_DPRINTF("ACPI: DBG: 0x%08x\n", val); } static void pm_io_space_update(PIIX4PMState *s) @@ -266,9 +261,7 @@ static void pm_io_space_update(PIIX4PMState *s) pm_io_base &= 0xffc0; /* XXX: need to improve memory and ioport allocation */ -#if defined(DEBUG) - printf("PM: mapping to 0x%x\n", pm_io_base); -#endif + PIIX4_DPRINTF("PM: mapping to 0x%x\n", pm_io_base); register_ioport_write(pm_io_base, 64, 2, pm_ioport_writew, s); register_ioport_read(pm_io_base, 64, 2, pm_ioport_readw, s); register_ioport_write(pm_io_base, 64, 4, pm_ioport_writel, s); @@ -456,9 +449,7 @@ static uint32_t gpe_readb(void *opaque, uint32_t addr) break; } -#if defined(DEBUG) - printf("gpe read %x == %x\n", addr, val); -#endif + PIIX4_DPRINTF("gpe read %x == %x\n", addr, val); return val; } @@ -498,9 +489,7 @@ static void gpe_writeb(void *opaque, uint32_t addr, uint32_t val) break; } -#if defined(DEBUG) - printf("gpe write %x <== %d\n", addr, val); -#endif + PIIX4_DPRINTF("gpe write %x <== %d\n", addr, val); } static uint32_t pcihotplug_read(void *opaque, uint32_t addr) @@ -518,9 +507,7 @@ static uint32_t pcihotplug_read(void *opaque, uint32_t addr) break; } -#if defined(DEBUG) - printf("pcihotplug read %x == %x\n", addr, val); -#endif + PIIX4_DPRINTF("pcihotplug read %x == %x\n", addr, val); return val; } @@ -536,16 +523,12 @@ static void pcihotplug_write(void *opaque, uint32_t addr, uint32_t val) break; } -#if defined(DEBUG) - printf("pcihotplug write %x <== %d\n", addr, val); -#endif + PIIX4_DPRINTF("pcihotplug write %x <== %d\n", addr, val); } static uint32_t pciej_read(void *opaque, uint32_t addr) { -#if defined(DEBUG) - printf("pciej read %x\n", addr); -#endif + PIIX4_DPRINTF("pciej read %x\n", addr); return 0; } @@ -564,9 +547,7 @@ static void pciej_write(void *opaque, uint32_t addr, uint32_t val) } -#if defined(DEBUG) - printf("pciej write %x <== %d\n", addr, val); -#endif + PIIX4_DPRINTF("pciej write %x <== %d\n", addr, val); } static int piix4_device_hotplug(DeviceState *qdev, PCIDevice *dev, int state);