From patchwork Thu Jan 20 07:21:38 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Isaku Yamahata X-Patchwork-Id: 79643 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 3D080B70B3 for ; Thu, 20 Jan 2011 18:23:45 +1100 (EST) Received: from localhost ([127.0.0.1]:36581 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Pforu-0001SH-9N for incoming@patchwork.ozlabs.org; Thu, 20 Jan 2011 02:23:42 -0500 Received: from [140.186.70.92] (port=52795 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Pfoq3-0001Oj-Jn for qemu-devel@nongnu.org; Thu, 20 Jan 2011 02:21:48 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Pfoq0-00017Z-GX for qemu-devel@nongnu.org; Thu, 20 Jan 2011 02:21:47 -0500 Received: from mail.valinux.co.jp ([210.128.90.3]:55282) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Pfoq0-00016Y-6v for qemu-devel@nongnu.org; Thu, 20 Jan 2011 02:21:44 -0500 Received: from ps.local.valinux.co.jp (vagw.valinux.co.jp [210.128.90.14]) by mail.valinux.co.jp (Postfix) with SMTP id ED604874A5; Thu, 20 Jan 2011 16:21:41 +0900 (JST) Received: (nullmailer pid 30587 invoked by uid 1000); Thu, 20 Jan 2011 07:21:40 -0000 From: Isaku Yamahata To: qemu-devel@nongnu.org Date: Thu, 20 Jan 2011 16:21:38 +0900 Message-Id: <034ab35157c0746ad0b9abe6c69111675b6e4d80.1295507931.git.yamahata@valinux.co.jp> X-Mailer: git-send-email 1.7.1.1 In-Reply-To: References: In-Reply-To: References: X-Virus-Scanned: clamav-milter 0.95.2 at va-mail.local.valinux.co.jp X-Virus-Status: Clean X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 3) Cc: yamahata@valinux.co.jp, mst@redhat.com Subject: [Qemu-devel] [PATCH 1/3] pci: deassert intx on reset. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org deassert intx on device reset. So far pci_device_reset() is used for system reset. In that case, interrupt controller is reset at the same time so that all irq is are deasserted. But now pci bus reset/flr is supported, and in that case irq needs to be disabled explicitly. Signed-off-by: Isaku Yamahata --- hw/pci.c | 9 +++++++++ hw/pci.h | 2 ++ 2 files changed, 11 insertions(+), 0 deletions(-) diff --git a/hw/pci.c b/hw/pci.c index e1e7b25..de6370f 100644 --- a/hw/pci.c +++ b/hw/pci.c @@ -137,6 +137,14 @@ static void pci_update_irq_status(PCIDevice *dev) } } +void pci_device_deassert_intx(PCIDevice *dev) +{ + int i; + for (i = 0; i < PCI_NUM_PINS; ++i) { + qemu_set_irq(dev->irq[i], 0); + } +} + /* * This function is called on #RST and FLR. * FLR if PCI_EXP_DEVCTL_BCR_FLR is set @@ -152,6 +160,7 @@ void pci_device_reset(PCIDevice *dev) dev->irq_state = 0; pci_update_irq_status(dev); + pci_device_deassert_intx(dev); /* Clear all writeable bits */ pci_word_test_and_clear_mask(dev->config + PCI_COMMAND, pci_get_word(dev->wmask + PCI_COMMAND) | diff --git a/hw/pci.h b/hw/pci.h index a0fd953..01c3285 100644 --- a/hw/pci.h +++ b/hw/pci.h @@ -265,6 +265,8 @@ void do_pci_info_print(Monitor *mon, const QObject *data); void do_pci_info(Monitor *mon, QObject **ret_data); void pci_bridge_update_mappings(PCIBus *b); +void pci_device_deassert_intx(PCIDevice *dev); + static inline void pci_set_byte(uint8_t *config, uint8_t val) {