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Show patches with
: Submitter =
Jose Ricardo Ziviani
| State =
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| 120 patches
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«
1
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Patch
Series
A/F/R/T
S/W/F
Date
Submitter
Delegate
State
Fix a deadlock case in the CPU hotplug flow
Fix a deadlock case in the CPU hotplug flow
- - 1 -
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2018-09-02
Jose Ricardo Ziviani
New
[v2] kvm-all: Partially reverts 4fe6d78b2e to remove the cleanup call
[v2] kvm-all: Partially reverts 4fe6d78b2e to remove the cleanup call
- - 1 1
-
-
-
2018-01-23
Jose Ricardo Ziviani
New
Revert "virtio: postpone the execution of event_notifier_cleanup function"
Revert "virtio: postpone the execution of event_notifier_cleanup function"
- - - 1
-
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2018-01-23
Jose Ricardo Ziviani
New
[v2,2/2] ppc: spapr: Check if thread argument is supported by host KVM
Small fixes for SMT guests in Power9
- - - -
-
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2018-01-14
Jose Ricardo Ziviani
New
[v2,1/2] ppc: Change Power9 compat table to support at most 8 threads/core
Small fixes for SMT guests in Power9
- - - -
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2018-01-14
Jose Ricardo Ziviani
New
[1/1] spapr: Check SMT based on KVM_CAP_PPC_SMT_POSSIBLE
Check SMT based on KVM_CAP_PPC_SMT_POSSIBLE
- - - -
-
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-
2018-01-06
Jose Ricardo Ziviani
New
simpletrace: Improve the error message if event is not declared
- - 1 -
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-
2017-05-29
Jose Ricardo Ziviani
New
[Risu,v3,4/4] build: Add support to PowerPC BE and remove ARCH
- - - -
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2017-05-25
Jose Ricardo Ziviani
New
[Risu,v3,3/4] risugen, risugen_ppc64.pm: Add support ppc64 (big-endian)
- - - -
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2017-05-25
Jose Ricardo Ziviani
New
[Risu,v3,2/4] configure: Add initial support to PPC64 (big endian)
- - - -
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2017-05-25
Jose Ricardo Ziviani
New
[Risu,v3,1/4] risugen_ppc64: Load random 128-bit data to vector registers
- - - -
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2017-05-25
Jose Ricardo Ziviani
New
Revert "target-ppc/kvm: Enable in-kernel TCE acceleration for multi-tce"
- - - -
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2017-05-08
Jose Ricardo Ziviani
New
[v2] trace: add qemu mutex lock and unlock trace events
- - 1 -
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2017-04-24
Jose Ricardo Ziviani
New
trace: add qemu mutex lock and unlock trace events
- - - -
-
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-
2017-04-24
Jose Ricardo Ziviani
New
[2/2] vfio: enable 8-byte reads/writes to vfio
- - - -
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-
2017-04-19
Jose Ricardo Ziviani
New
[1/2] vfio: Set MemoryRegionOps:max_access_size and min_access_size
- - - -
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-
2017-04-19
Jose Ricardo Ziviani
New
[Risu,v2,3/3] risugen, risugen_ppc64.pm: Add support ppc64 (big-endian)
- - - -
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2017-03-09
Jose Ricardo Ziviani
New
[Risu,v2,2/3] configure: Add initial support to PPC64 (big endian)
- - - -
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2017-03-09
Jose Ricardo Ziviani
New
[Risu,v2,1/3] risugen_ppc64: Load random 128-bit data to VSX registers
- - - -
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-
2017-03-09
Jose Ricardo Ziviani
New
[Risu,5/5] risugen_ppc64: Remove unused code
- - - -
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2017-02-27
Jose Ricardo Ziviani
New
[Risu,4/5] risugen, risugen_ppc64.pm: Add support ppc64 (big-endian)
- - - -
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2017-02-27
Jose Ricardo Ziviani
New
[Risu,3/5] configure: Add initial support to PPC64 (big endian)
- - - -
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2017-02-27
Jose Ricardo Ziviani
New
[Risu,2/5] risu_reginfo_ppc64le: Remove unused code from PPC64 register comparison
- - - -
-
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2017-02-27
Jose Ricardo Ziviani
New
[Risu,1/5] risugen_ppc64: Load random 128-bit data to VSX registers
- - - -
-
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2017-02-27
Jose Ricardo Ziviani
New
[Risu,7/7] risu_ppc64le: fix minor code style in assembly test code
- - - -
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2017-02-04
Jose Ricardo Ziviani
New
[Risu,6/7] risu_ppc64le: remove fancy shell character cont from messages
- - - -
-
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2017-02-04
Jose Ricardo Ziviani
New
[Risu,5/7] risu_ppc64le: stop loading data to register 1 and 13
- - - -
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2017-02-04
Jose Ricardo Ziviani
New
[Risu,4/7] risu_ppc64le: implement FP random data for test improvement
- - - -
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2017-02-04
Jose Ricardo Ziviani
New
[Risu,3/7] risu_ppc64le: implement sign extend for small neg constants
- - - -
-
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-
2017-02-04
Jose Ricardo Ziviani
New
[Risu,2/7] risu_ppc64le: fix 32-bit mov immediate
- - - -
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2017-02-04
Jose Ricardo Ziviani
New
[Risu,1/7] risu_ppc64le: improve xsrqpi[x] and xsrqpxp instructions
- - - -
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-
2017-02-04
Jose Ricardo Ziviani
New
[4/4] ppc: implement xssubqp instruction
- - - -
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2017-02-03
Jose Ricardo Ziviani
New
[3/4] ppc: implement xssqrtqp instruction
- - - -
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-
2017-02-03
Jose Ricardo Ziviani
New
[2/4] ppc: implement xsrqpxp instruction
- - - -
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2017-02-03
Jose Ricardo Ziviani
New
[1/4] ppc: implement xsrqpi[x] instruction
- - - -
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2017-02-03
Jose Ricardo Ziviani
New
linux-user: fill target sigcontext struct accordingly
- - 1 -
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2017-01-31
Jose Ricardo Ziviani
New
[Risu,2/2] risu_ppc64: Compare FPSCR flags
- - - -
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2017-01-30
Jose Ricardo Ziviani
New
[Risu,1/2] risu_ppc64: Fix Risu to run under qemu linux user
- - - -
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2017-01-30
Jose Ricardo Ziviani
New
[v6,2/2] ppc: Implement bcdutrunc. instruction
- - - -
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-
2017-01-12
Jose Ricardo Ziviani
New
[v6,1/2] ppc: Implement bcdtrunc. instruction
- - - -
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2017-01-12
Jose Ricardo Ziviani
New
[PATCHi,v2] ppc: Fix a warning in bcdcfz code and improve BCD_DIG_BYTE macro
- - 1 -
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2017-01-11
Jose Ricardo Ziviani
New
ppc: Fix a warning in bcdcfz code and improve BCD_DIG_BYTE macro
- - 1 -
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2017-01-11
Jose Ricardo Ziviani
New
[v5,7/7] ppc: Implement bcdutrunc. instruction
- - - -
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-
2017-01-10
Jose Ricardo Ziviani
New
[v5,6/7] ppc: Implement bcdtrunc. instruction
- - - -
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-
2017-01-10
Jose Ricardo Ziviani
New
[v5,5/7] ppc: Implement bcdsr. instruction
- - - -
-
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-
2017-01-10
Jose Ricardo Ziviani
New
[v5,4/7] ppc: Implement bcdus. instruction
- - - -
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-
2017-01-10
Jose Ricardo Ziviani
New
[v5,3/7] ppc: Implement bcds. instruction
- - - -
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2017-01-10
Jose Ricardo Ziviani
New
[v5,2/7] host-utils: Implement unsigned quadword left/right shift and unit tests
- - 1 -
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2017-01-10
Jose Ricardo Ziviani
New
[v5,1/7] host-utils: Move 128-bit guard macro to .c file
- - 1 -
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2017-01-10
Jose Ricardo Ziviani
New
[v4,6/6] target-ppc: Implement bcdutrunc. instruction
- - - -
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2016-12-19
Jose Ricardo Ziviani
New
[v4,5/6] target-ppc: Implement bcdtrunc. instruction
- - - -
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2016-12-19
Jose Ricardo Ziviani
New
[v4,4/6] target-ppc: Implement bcdsr. instruction
- - - -
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2016-12-19
Jose Ricardo Ziviani
New
[v4,3/6] target-ppc: Implement bcdus. instruction
- - - -
-
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2016-12-19
Jose Ricardo Ziviani
New
[v4,2/6] target-ppc: Implement bcds. instruction
- - - -
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2016-12-19
Jose Ricardo Ziviani
New
[v4,1/6] target-ppc: Implement unsigned quadword left/right shift and unit tests
- - - -
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-
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2016-12-19
Jose Ricardo Ziviani
New
[v3,6/6] target-ppc: Implement bcdutrunc. instruction
- - - -
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2016-12-08
Jose Ricardo Ziviani
New
[v3,5/6] target-ppc: Implement bcdtrunc. instruction
- - - -
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2016-12-08
Jose Ricardo Ziviani
New
[v3,4/6] target-ppc: Implement bcdsr. instruction
- - - -
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2016-12-08
Jose Ricardo Ziviani
New
[v3,3/6] target-ppc: Implement bcdus. instruction
- - - -
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2016-12-08
Jose Ricardo Ziviani
New
[v3,2/6] target-ppc: Implement bcds. instruction
- - - -
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2016-12-08
Jose Ricardo Ziviani
New
[v3,1/6] target-ppc: Implement unsigned quadword left/right shift and unit tests
- - - -
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2016-12-08
Jose Ricardo Ziviani
New
[v2,7/7] target-ppc: Implement bcdtrunc. instruction
- - - -
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2016-12-06
Jose Ricardo Ziviani
New
[v2,6/7] target-ppc: Implement bcdtrunc. instruction
- - - -
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2016-12-06
Jose Ricardo Ziviani
New
[v2,5/7] target-ppc: Implement bcdsr. instruction
- - - -
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2016-12-06
Jose Ricardo Ziviani
New
[v2,4/7] target-ppc: Implement bcdus. instruction
- - - -
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2016-12-06
Jose Ricardo Ziviani
New
[v2,3/7] target-ppc: Implement bcds. instruction
- - - -
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2016-12-06
Jose Ricardo Ziviani
New
[v2,2/7] target-ppc: Implement unsigned quadword left/right shift and unit tests
- - - -
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2016-12-06
Jose Ricardo Ziviani
New
[v2,1/7] target-ppc: Implement bcd_is_valid function
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2016-12-06
Jose Ricardo Ziviani
New
[7/7] target-ppc: Implement bcdtrunc. instruction
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2016-12-03
Jose Ricardo Ziviani
New
[6/7] target-ppc: Implement bcdtrunc. instruction
- - - -
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2016-12-03
Jose Ricardo Ziviani
New
[5/7] target-ppc: Implement bcdsr. instruction
- - - -
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2016-12-03
Jose Ricardo Ziviani
New
[4/7] target-ppc: Implement bcdus. instruction
- - - -
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2016-12-03
Jose Ricardo Ziviani
New
[3/7] target-ppc: Implement bcds. instruction
- - 1 -
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2016-12-03
Jose Ricardo Ziviani
New
[2/7] target-ppc: Implement unsigned quadword left/right shift and unit tests
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2016-12-03
Jose Ricardo Ziviani
New
[1/7] target-ppc: Implement bcd_is_valid function
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2016-12-03
Jose Ricardo Ziviani
New
[v3,4/4] target-ppc: Implement bcdsetsgn. instruction
- - 1 -
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2016-11-25
Jose Ricardo Ziviani
New
[v3,3/4] target-ppc: Implement bcdcpsgn. instruction
- - 1 -
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2016-11-25
Jose Ricardo Ziviani
New
[v3,2/4] target-ppc: Implement bcdctsq. instruction
- - 1 -
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2016-11-25
Jose Ricardo Ziviani
New
[v3,1/4] target-ppc: Implement bcdcfsq. instruction
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2016-11-25
Jose Ricardo Ziviani
New
[v2,4/4] target-ppc: Implement bcdsetsgn. instruction
- - 1 -
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2016-11-23
Jose Ricardo Ziviani
New
[v2,3/4] target-ppc: Implement bcdcpsgn. instruction
- - 1 -
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2016-11-23
Jose Ricardo Ziviani
New
[v2,2/4] target-ppc: Implement bcdctsq. instruction
- - 1 -
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2016-11-23
Jose Ricardo Ziviani
New
[v2,1/4] target-ppc: Implement bcdcfsq. instruction
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2016-11-23
Jose Ricardo Ziviani
New
target-ppc: fix index array of national digits
- - 1 -
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2016-11-21
Jose Ricardo Ziviani
New
[4/4] target-ppc: Implement bcdsetsgn. instruction
- - - -
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2016-11-16
Jose Ricardo Ziviani
New
[3/4] target-ppc: Implement bcdcpsgn. instruction
- - - -
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2016-11-16
Jose Ricardo Ziviani
New
[2/4] target-ppc: Implement bcdctsq. instruction
- - - -
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2016-11-16
Jose Ricardo Ziviani
New
[1/4] target-ppc: Implement bcdcfsq. instruction
- - - -
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2016-11-16
Jose Ricardo Ziviani
New
[v5,4/4] target-ppc: Implement bcdctz. instruction
- - - -
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2016-11-08
Jose Ricardo Ziviani
New
[v5,3/4] target-ppc: Implement bcdcfz. instruction
- - - -
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2016-11-08
Jose Ricardo Ziviani
New
[v5,2/4] target-ppc: Implement bcdctn. instruction
- - - -
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2016-11-08
Jose Ricardo Ziviani
New
[v5,1/4] target-ppc: Implement bcdcfn. instruction
- - 1 -
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2016-11-08
Jose Ricardo Ziviani
New
[Risu,v2,9/9] Implement risufile with all PPC64 instructions
- - - -
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2016-11-06
Jose Ricardo Ziviani
New
[Risu,v2,8/9] Implement risugen module for PPC64
- - - -
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2016-11-06
Jose Ricardo Ziviani
New
[Risu,v2,7/9] Add PPC64 in risu build system
- - - -
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2016-11-06
Jose Ricardo Ziviani
New
[Risu,v2,6/9] Implement initial support for PPC64
- - - -
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2016-11-06
Jose Ricardo Ziviani
New
[Risu,v2,5/9] Implement basic test code for PPC64
- - - -
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2016-11-06
Jose Ricardo Ziviani
New
[Risu,v2,4/9] Implement lib to deal with PPC64 registers
- - - -
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2016-11-06
Jose Ricardo Ziviani
New
[Risu,v2,3/9] Change mode directive of ARM risu files
- - - -
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2016-11-06
Jose Ricardo Ziviani
New
[Risu,v2,2/9] Refactor risugen to remove ARM specific code
- - - -
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2016-11-06
Jose Ricardo Ziviani
New
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