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Show patches with
: Submitter =
Fabian Aggeler
| State =
Action Required
| Archived =
No
| 84 patches
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Apply
Patch
Series
A/F/R/T
S/W/F
Date
Submitter
Delegate
State
[15/15] hw/intc/arm_gic: add gic_update() for grouping
- - - -
-
-
-
2014-08-22
Fabian Aggeler
New
[14/15] hw/intc/arm_gic: Break out gic_update() function
- - - -
-
-
-
2014-08-22
Fabian Aggeler
New
[13/15] hw/intc/arm_gic: Restrict priority view
- - - -
-
-
-
2014-08-22
Fabian Aggeler
New
[12/15] hw/intc/arm_gic: Change behavior of IAR writes
- - - -
-
-
-
2014-08-22
Fabian Aggeler
New
[11/15] hw/intc/arm_gic: Change behavior of EOIR writes
- - - -
-
-
-
2014-08-22
Fabian Aggeler
New
[10/15] hw/intc/arm_gic: Handle grouping for GICC_HPPIR
- - - -
-
-
-
2014-08-22
Fabian Aggeler
New
[09/15] hw/intc/arm_gic: Implement Non-secure view of RPR
- - - -
-
-
-
2014-08-22
Fabian Aggeler
New
[08/15] hw/intc/arm_gic: Make ICCBPR/GICC_BPR banked
- - - -
-
-
-
2014-08-22
Fabian Aggeler
New
[07/15] hw/intc/arm_gic: Make ICCICR/GICC_CTLR banked
- - - -
-
-
-
2014-08-22
Fabian Aggeler
New
[06/15] hw/intc/arm_gic: Make ICDDCR/GICD_CTLR banked
- - - -
-
-
-
2014-08-22
Fabian Aggeler
New
[05/15] hw/intc/arm_gic: Add Interrupt Group Registers
- - - -
-
-
-
2014-08-22
Fabian Aggeler
New
[04/15] hw/intc/arm_gic: Add ns_access() function
- - - -
-
-
-
2014-08-22
Fabian Aggeler
New
[03/15] hw/intc/arm_gic: Add Security Extensions property
- - - -
-
-
-
2014-08-22
Fabian Aggeler
New
[02/15] hw/arm/vexpress.c: Wire FIQ between CPU <> GIC
- - - -
-
-
-
2014-08-22
Fabian Aggeler
New
[01/15] hw/intc/arm_gic: Request FIQ sources
- - - -
-
-
-
2014-08-22
Fabian Aggeler
New
[v3,2/2] hw/arm/vexpress: add SP810 to the vexpress
- - - -
-
-
-
2014-08-17
Fabian Aggeler
New
[v3,1/2] hw/misc/arm_sp810: Create SP810 device
- - - -
-
-
-
2014-08-17
Fabian Aggeler
New
[v2,2/2] hw/arm/vexpress: add SP810 to the vexpress
- - - -
-
-
-
2014-08-05
Fabian Aggeler
New
[v2,1/2] hw/misc/arm_sp810: Create SP810 device
- - - -
-
-
-
2014-08-05
Fabian Aggeler
New
[2/2] hw/arm/vexpress: add SP810 to the vexpress
- - - -
-
-
-
2014-07-16
Fabian Aggeler
New
[1/2] hw/misc/arm_sp810: Create SP810 device
- - - -
-
-
-
2014-07-16
Fabian Aggeler
New
[v3,32/32] target-arm: make c13 cp regs banked (FCSEIDR, ...)
- - - -
-
-
-
2014-06-10
Fabian Aggeler
New
[v3,31/32] target-arm: make VBAR banked
- - - -
-
-
-
2014-06-10
Fabian Aggeler
New
[v3,30/32] target-arm: make PAR banked
- - - -
-
-
-
2014-06-10
Fabian Aggeler
New
[v3,29/32] target-arm: make IFAR/DFAR banked
- - - -
-
-
-
2014-06-10
Fabian Aggeler
New
[v3,28/32] target-arm: make DFSR banked
- - - -
-
-
-
2014-06-10
Fabian Aggeler
New
[v3,27/32] target-arm: make IFSR banked
- - - -
-
-
-
2014-06-10
Fabian Aggeler
New
[v3,26/32] target-arm: make DACR banked
- - - -
-
-
-
2014-06-10
Fabian Aggeler
New
[v3,25/32] target-arm: make c2_mask and c2_base_mask banked
- - - -
-
-
-
2014-06-10
Fabian Aggeler
New
[v3,24/32] target-arm: add TCR_EL3 and make TTBCR banked
- - - -
-
-
-
2014-06-10
Fabian Aggeler
New
[v3,23/32] target-arm: add TTBR0_EL3 and make TTBR0/1 banked
- - - -
-
-
-
2014-06-10
Fabian Aggeler
New
[v3,22/32] target-arm: make CSSELR banked
- - - -
-
-
-
2014-06-10
Fabian Aggeler
New
[v3,21/32] target-arm: add SCTLR_EL3 and make SCTLR banked
- - - -
-
-
-
2014-06-10
Fabian Aggeler
New
[v3,20/32] target-arm: arrayfying fieldoffset for banking
- - - -
-
-
-
2014-06-10
Fabian Aggeler
New
[v3,19/32] target-arm: insert Aarch32 cpregs twice into hashtable
- - - -
-
-
-
2014-06-10
Fabian Aggeler
New
[v3,18/32] target-arm: add macros to access banked registers
- - - -
-
-
-
2014-06-10
Fabian Aggeler
New
[v3,17/32] target-arm: add MVBAR support
- - - -
-
-
-
2014-06-10
Fabian Aggeler
New
[v3,16/32] target-arm: add SDER definition
- - - -
-
-
-
2014-06-10
Fabian Aggeler
New
[v3,15/32] target-arm: add NSACR register
- - - -
-
-
-
2014-06-10
Fabian Aggeler
New
[v3,14/32] target-arm: Respect SCR.FW, SCR.AW and SCTLR.NMFI
- - - -
-
-
-
2014-06-10
Fabian Aggeler
New
[v3,13/32] target-arm: implement IRQ/FIQ routing to Monitor mode
- - - -
-
-
-
2014-06-10
Fabian Aggeler
New
[v3,12/32] target-arm: use dedicated target_el function
- - - -
-
-
-
2014-06-10
Fabian Aggeler
New
[v3,11/32] target-arm: add async excp target_el&mode function
- - - -
-
-
-
2014-06-10
Fabian Aggeler
New
[v3,10/32] target-arm: extend Aarch64 SCR.{FIQ|IRQ} handling
- - - -
-
-
-
2014-06-10
Fabian Aggeler
New
[v3,09/32] target-arm: extend Aarch32 async excp masking
- - - -
-
-
-
2014-06-10
Fabian Aggeler
New
[v3,08/32] target-arm: A32: Emulate the SMC instruction
- - - -
-
-
-
2014-06-10
Fabian Aggeler
New
[v3,07/32] target-arm: add non-secure Translation Block flag
- - 1 -
-
-
-
2014-06-10
Fabian Aggeler
New
[v3,06/32] target-arm: make arm_current_pl() return PL3
- - - -
-
-
-
2014-06-10
Fabian Aggeler
New
[v3,05/32] target-arm: reject switching to monitor mode
- - 1 -
-
-
-
2014-06-10
Fabian Aggeler
New
[v3,04/32] target-arm: add arm_is_secure() function
- - - -
-
-
-
2014-06-10
Fabian Aggeler
New
[v3,03/32] target-arm: increase arrays of registers R13 & R14
- - 1 -
-
-
-
2014-06-10
Fabian Aggeler
New
[v3,02/32] target-arm: move Aarch32 SCR into security reglist
- - - -
-
-
-
2014-06-10
Fabian Aggeler
New
[v3,01/32] target-arm: add cpu feature EL3 to CPUs with Security Extensions
- - - -
-
-
-
2014-06-10
Fabian Aggeler
New
[v2] target-arm: implement PD0/PD1 bits for TTBCR
- - - -
-
-
-
2014-06-10
Fabian Aggeler
New
[v2] target-arm: implement PD0/PD1 bits for TTBCR
- - - -
-
-
-
2014-06-05
Fabian Aggeler
New
[v2] target-arm: Prepare cpreg writefns/readfns for EL3/SecExt
- - 1 -
-
-
-
2014-06-05
Fabian Aggeler
New
target-arm: set SBOP/SBZP bits of SCTLR
- - - -
-
-
-
2014-05-30
Fabian Aggeler
New
target-arm: implement PD0/PD1 bits for TTBCR
- - - -
-
-
-
2014-05-30
Fabian Aggeler
New
[v2] target-arm: implement CPACR register logic for ARMv7
- - 1 -
-
-
-
2014-05-19
Fabian Aggeler
New
target-arm: Prepare cpreg writefns/readfns for EL3/SecExt
- - 1 -
-
-
-
2014-05-16
Fabian Aggeler
New
target-arm: implement CPACR register logic
- - 1 -
-
-
-
2014-05-16
Fabian Aggeler
New
[v2,23/23] target-arm: Respect SCR.FW, SCR.AW and SCTLR.NMFI
- - - -
-
-
-
2014-05-13
Fabian Aggeler
New
[v2,22/23] target-arm: implement IRQ/FIQ routing to Monitor mode
- - - -
-
-
-
2014-05-13
Fabian Aggeler
New
[v2,21/23] target-arm: implement SMC instruction
- - - -
-
-
-
2014-05-13
Fabian Aggeler
New
[v2,20/23] target-arm: add MVBAR support
- - - -
-
-
-
2014-05-13
Fabian Aggeler
New
[v2,19/23] target-arm: maintain common bits of banked CP registers
- - - -
-
-
-
2014-05-13
Fabian Aggeler
New
[v2,18/23] target-arm: Convert banked coprocessor registers
- - - -
-
-
-
2014-05-13
Fabian Aggeler
New
[v2,17/23] target-arm: Use raw_write/raw_read whenever possible
- - - -
-
-
-
2014-05-13
Fabian Aggeler
New
[v2,16/23] target-arm: Use arm_current_sctlr to access SCTLR
- - - -
-
-
-
2014-05-13
Fabian Aggeler
New
[v2,15/23] target-arm: Restrict EL3 to Aarch32 state
- - - -
-
-
-
2014-05-13
Fabian Aggeler
New
[v2,14/23] target-arm: add banked coprocessor register type and macros
- - - -
-
-
-
2014-05-13
Fabian Aggeler
New
[v2,13/23] target-arm: Split TLB for secure state and EL3 in Aarch64
- - - -
-
-
-
2014-05-13
Fabian Aggeler
New
[v2,12/23] target-arm: add SDER definition
- - - -
-
-
-
2014-05-13
Fabian Aggeler
New
[v2,11/23] target-arm: add NSACR support
- - - -
-
-
-
2014-05-13
Fabian Aggeler
New
[v2,10/23] target-arm: implement CPACR register logic
- - - -
-
-
-
2014-05-13
Fabian Aggeler
New
[v2,09/23] target-arm: add non-secure Translation Block flag
- - - -
-
-
-
2014-05-13
Fabian Aggeler
New
[v2,08/23] target-arm: adjust arm_current_pl() for Security Extensions
- - - -
-
-
-
2014-05-13
Fabian Aggeler
New
[v2,07/23] target-arm: reject switching to monitor mode from non-secure state
- - - -
-
-
-
2014-05-13
Fabian Aggeler
New
[v2,06/23] target-arm: add arm_is_secure() function
- - - -
-
-
-
2014-05-13
Fabian Aggeler
New
[v2,05/23] target-arm: add CPU Monitor mode
- - - -
-
-
-
2014-05-13
Fabian Aggeler
New
[v2,04/23] target-arm: preserve RAO/WI bits of ARMv7 SCTLR
- - - -
-
-
-
2014-05-13
Fabian Aggeler
New
[v2,03/23] target-arm: adjust TTBCR for Security Extension feature
- - - -
-
-
-
2014-05-13
Fabian Aggeler
New
[v2,02/23] target-arm: move SCR into Security Extensions register list
- - - -
-
-
-
2014-05-13
Fabian Aggeler
New
[v2,01/23] target-arm: add new CPU feature for Security Extensions
- - - -
-
-
-
2014-05-13
Fabian Aggeler
New