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Patch
Series
A/F/R/T
S/W/F
Date
Submitter
Delegate
State
[PULL,00/10] tcg patch queue, v3
- - - -
-
-
-
2021-09-22
Richard Henderson
New
[RFC,v7] virtio/vsock: add two more queues for datagram types
[RFC,v7] virtio/vsock: add two more queues for datagram types
- - - -
-
-
-
2021-09-22
Jiang Wang
New
[v2,30/30] configure, meson.build: Mark support for loongarch64 hosts
LoongArch64 port of QEMU TCG
- - 1 -
-
-
-
2021-09-21
WANG Xuerui
New
[v2,29/30] accel/tcg/user-exec: Implement CPU-specific signal handler for loongarch64 hosts
LoongArch64 port of QEMU TCG
- - 1 -
-
-
-
2021-09-21
WANG Xuerui
New
[v2,28/30] linux-user: Add safe syscall handling for loongarch64 hosts
LoongArch64 port of QEMU TCG
- - 1 -
-
-
-
2021-09-21
WANG Xuerui
New
[v2,27/30] tcg/loongarch64: Register the JIT
LoongArch64 port of QEMU TCG
- - 1 -
-
-
-
2021-09-21
WANG Xuerui
New
[v2,26/30] tcg/loongarch64: Implement tcg_target_init
LoongArch64 port of QEMU TCG
- - 1 -
-
-
-
2021-09-21
WANG Xuerui
New
[v2,25/30] tcg/loongarch64: Implement exit_tb/goto_tb
LoongArch64 port of QEMU TCG
- - 1 -
-
-
-
2021-09-21
WANG Xuerui
New
[v2,24/30] tcg/loongarch64: Implement tcg_target_qemu_prologue
LoongArch64 port of QEMU TCG
- - 1 -
-
-
-
2021-09-21
WANG Xuerui
New
[v2,23/30] tcg/loongarch64: Add softmmu load/store helpers, implement qemu_ld/qemu_st ops
LoongArch64 port of QEMU TCG
- - - -
-
-
-
2021-09-21
WANG Xuerui
New
[v2,22/30] tcg/loongarch64: Implement simple load/store ops
LoongArch64 port of QEMU TCG
- - 1 -
-
-
-
2021-09-21
WANG Xuerui
New
[v2,21/30] tcg/loongarch64: Implement tcg_out_call
LoongArch64 port of QEMU TCG
- - 1 -
-
-
-
2021-09-21
WANG Xuerui
New
[v2,20/30] tcg/loongarch64: Implement setcond ops
LoongArch64 port of QEMU TCG
- - 1 -
-
-
-
2021-09-21
WANG Xuerui
New
[v2,19/30] tcg/loongarch64: Implement br/brcond ops
LoongArch64 port of QEMU TCG
- - 1 -
-
-
-
2021-09-21
WANG Xuerui
New
[v2,18/30] tcg/loongarch64: Implement mul/mulsh/muluh/div/divu/rem/remu ops
LoongArch64 port of QEMU TCG
- - 1 -
-
-
-
2021-09-21
WANG Xuerui
New
[v2,17/30] tcg/loongarch64: Implement add/sub ops
LoongArch64 port of QEMU TCG
- - 1 -
-
-
-
2021-09-21
WANG Xuerui
New
[v2,16/30] tcg/loongarch64: Implement shl/shr/sar/rotl/rotr ops
LoongArch64 port of QEMU TCG
- - 1 -
-
-
-
2021-09-21
WANG Xuerui
New
[v2,15/30] tcg/loongarch64: Implement clz/ctz ops
LoongArch64 port of QEMU TCG
- - 1 -
-
-
-
2021-09-21
WANG Xuerui
New
[v2,14/30] tcg/loongarch64: Implement bswap32_i32/bswap32_i64/bswap64_i64
LoongArch64 port of QEMU TCG
- - 1 -
-
-
-
2021-09-21
WANG Xuerui
New
[v2,13/30] tcg/loongarch64: Implement deposit/extract ops
LoongArch64 port of QEMU TCG
- - 1 -
-
-
-
2021-09-21
WANG Xuerui
New
[v2,12/30] tcg/loongarch64: Implement not/and/or/xor/nor/andc/orc/eqv ops
LoongArch64 port of QEMU TCG
- - 1 -
-
-
-
2021-09-21
WANG Xuerui
New
[v2,11/30] tcg/loongarch64: Implement sign-/zero-extension ops
LoongArch64 port of QEMU TCG
- - 1 -
-
-
-
2021-09-21
WANG Xuerui
New
[v2,10/30] tcg/loongarch64: Implement goto_ptr
LoongArch64 port of QEMU TCG
- - 1 -
-
-
-
2021-09-21
WANG Xuerui
New
[v2,09/30] tcg/loongarch64: Implement tcg_out_mov and tcg_out_movi
LoongArch64 port of QEMU TCG
- - - -
-
-
-
2021-09-21
WANG Xuerui
New
[v2,08/30] tcg/loongarch64: Implement the memory barrier op
LoongArch64 port of QEMU TCG
- - 1 -
-
-
-
2021-09-21
WANG Xuerui
New
[v2,07/30] tcg/loongarch64: Implement necessary relocation operations
LoongArch64 port of QEMU TCG
- - 1 -
-
-
-
2021-09-21
WANG Xuerui
New
[v2,06/30] tcg/loongarch64: Define the operand constraints
LoongArch64 port of QEMU TCG
- - 1 -
-
-
-
2021-09-21
WANG Xuerui
New
[v2,05/30] tcg/loongarch64: Add register names, allocation order and input/output sets
LoongArch64 port of QEMU TCG
- - 1 -
-
-
-
2021-09-21
WANG Xuerui
New
[v2,04/30] tcg/loongarch64: Add generated instruction opcodes and encoding helpers
LoongArch64 port of QEMU TCG
1 - - -
-
-
-
2021-09-21
WANG Xuerui
New
[v2,03/30] tcg/loongarch64: Add the tcg-target.h file
LoongArch64 port of QEMU TCG
- - 1 -
-
-
-
2021-09-21
WANG Xuerui
New
[v2,02/30] MAINTAINERS: Add tcg/loongarch64 entry with myself as maintainer
LoongArch64 port of QEMU TCG
- - 1 -
-
-
-
2021-09-21
WANG Xuerui
New
[v2,01/30] elf: Add machine type value for LoongArch
LoongArch64 port of QEMU TCG
- - - -
-
-
-
2021-09-21
WANG Xuerui
New
spapr_numa.c: fixes in spapr_numa_FORM2_write_rtas_tables()
spapr_numa.c: fixes in spapr_numa_FORM2_write_rtas_tables()
- - 1 -
-
-
-
2021-09-21
Daniel Henrique Barboza
New
linux-user/syscall: add support for CLONE_PIDFD
linux-user/syscall: add support for CLONE_PIDFD
- - - -
-
-
-
2021-09-21
Andreas Schwab
New
[5/5,RFC] target/arm: Advertise MVE to gdb when present
target/arm: Support MVE in gdbstub
- - 1 -
-
-
-
2021-09-21
Peter Maydell
New
[4/5] target/arm: Don't put FPEXC and FPSID in org.gnu.gdb.arm.vfp XML
target/arm: Support MVE in gdbstub
- - 1 -
-
-
-
2021-09-21
Peter Maydell
New
[3/5] target/arm: Move gdbstub related code out of helper.c
target/arm: Support MVE in gdbstub
- - 2 -
-
-
-
2021-09-21
Peter Maydell
New
[2/5] target/arm: Fix coding style issues in gdbstub code in helper.c
target/arm: Support MVE in gdbstub
- - 2 -
-
-
-
2021-09-21
Peter Maydell
New
[1/5] configs: Don't include 32-bit-only GDB XML in aarch64 linux configs
target/arm: Support MVE in gdbstub
- - 1 -
-
-
-
2021-09-21
Peter Maydell
New
nbd/client: Request larger block status by default
nbd/client: Request larger block status by default
- - - -
-
-
-
2021-09-21
Eric Blake
New
[v2,2/2] vhost-vsock: handle common features in vhost-vsock-common
vhost-vsock: fixes for seqpacket support
- - - -
-
-
-
2021-09-21
Stefano Garzarella
New
[v2,1/2] vhost-vsock: fix migration issue when seqpacket is supported
vhost-vsock: fixes for seqpacket support
- 1 - -
-
-
-
2021-09-21
Stefano Garzarella
New
[PULL,v2,00/27] target-arm queuea
- - - -
-
-
-
2021-09-21
Peter Maydell
New
qemu-img: Consistent docs for convert -F
qemu-img: Consistent docs for convert -F
- 1 1 -
-
-
-
2021-09-21
Eric Blake
New
[v1] monitor: Consider "id" when rate-limiting MEMORY_DEVICE_SIZE_CHANGE qapi events
[v1] monitor: Consider "id" when rate-limiting MEMORY_DEVICE_SIZE_CHANGE qapi events
- 1 - -
-
-
-
2021-09-21
David Hildenbrand
New
[PULL,12/12] iotests: Add mirror-ready-cancel-error test
[PULL,01/12] job: Context changes in job_completed_txn_abort()
- - 1 1
-
-
-
2021-09-21
Vladimir Sementsov-Ogievskiy
New
[PULL,11/12] mirror: Do not clear .cancelled
[PULL,01/12] job: Context changes in job_completed_txn_abort()
- - 2 -
-
-
-
2021-09-21
Vladimir Sementsov-Ogievskiy
New
[PULL,10/12] mirror: Stop active mirroring after force-cancel
[PULL,01/12] job: Context changes in job_completed_txn_abort()
- - 2 -
-
-
-
2021-09-21
Vladimir Sementsov-Ogievskiy
New
[PULL,09/12] mirror: Check job_is_cancelled() earlier
[PULL,01/12] job: Context changes in job_completed_txn_abort()
- - 2 -
-
-
-
2021-09-21
Vladimir Sementsov-Ogievskiy
New
[PULL,08/12] mirror: Use job_is_cancelled()
[PULL,01/12] job: Context changes in job_completed_txn_abort()
- - 2 -
-
-
-
2021-09-21
Vladimir Sementsov-Ogievskiy
New
[PULL,07/12] job: Add job_cancel_requested()
[PULL,01/12] job: Context changes in job_completed_txn_abort()
- - 2 -
-
-
-
2021-09-21
Vladimir Sementsov-Ogievskiy
New
[PULL,06/12] jobs: Give Job.force_cancel more meaning
[PULL,01/12] job: Context changes in job_completed_txn_abort()
- - 3 -
-
-
-
2021-09-21
Vladimir Sementsov-Ogievskiy
New
[PULL,05/12] job: @force parameter for job_cancel_sync()
[PULL,01/12] job: Context changes in job_completed_txn_abort()
- - 2 -
-
-
-
2021-09-21
Vladimir Sementsov-Ogievskiy
New
[PULL,04/12] job: Force-cancel jobs in a failed transaction
[PULL,01/12] job: Context changes in job_completed_txn_abort()
- - 2 -
-
-
-
2021-09-21
Vladimir Sementsov-Ogievskiy
New
[PULL,03/12] mirror: Drop s->synced
[PULL,01/12] job: Context changes in job_completed_txn_abort()
- - 3 -
-
-
-
2021-09-21
Vladimir Sementsov-Ogievskiy
New
[PULL,02/12] mirror: Keep s->synced on error
[PULL,01/12] job: Context changes in job_completed_txn_abort()
- - 2 -
-
-
-
2021-09-21
Vladimir Sementsov-Ogievskiy
New
[PULL,01/12] job: Context changes in job_completed_txn_abort()
[PULL,01/12] job: Context changes in job_completed_txn_abort()
- - 1 -
-
-
-
2021-09-21
Vladimir Sementsov-Ogievskiy
New
[PULL,00/12] jobs: mirror: Handle errors after READY cancel
- - - -
-
-
-
2021-09-21
Vladimir Sementsov-Ogievskiy
New
[v3] hw/sensor: Add lsm303dlhc magnetometer device
[v3] hw/sensor: Add lsm303dlhc magnetometer device
- - - -
-
-
-
2021-09-21
Kevin Townsend
New
spapr/xive: Fix kvm_xive_source_reset trace event
spapr/xive: Fix kvm_xive_source_reset trace event
- - - -
-
-
-
2021-09-21
Cédric Le Goater
New
[PULL,v2,21/21] hw/riscv: opentitan: Correct the USB Dev address
[PULL,v2,01/21] target/riscv: Update the ePMP CSR address
- - 1 -
-
-
-
2021-09-21
Alistair Francis
New
[PULL,v2,20/21] target/riscv: csr: Rename HCOUNTEREN_CY and friends
[PULL,v2,01/21] target/riscv: Update the ePMP CSR address
- - 1 -
-
-
-
2021-09-21
Alistair Francis
New
[PULL,v2,19/21] target/riscv: Backup/restore mstatus.SD bit when virtual register swapped
[PULL,v2,01/21] target/riscv: Update the ePMP CSR address
- - 2 -
-
-
-
2021-09-21
Alistair Francis
New
[PULL,v2,18/21] docs/system/riscv: sifive_u: Update U-Boot instructions
[PULL,v2,01/21] target/riscv: Update the ePMP CSR address
- - 1 -
-
-
-
2021-09-21
Alistair Francis
New
[PULL,v2,17/21] hw/dma: sifive_pdma: don't set Control.error if 0 bytes to transfer
[PULL,v2,01/21] target/riscv: Update the ePMP CSR address
- - 1 2
-
-
-
2021-09-21
Alistair Francis
New
[PULL,v2,16/21] hw/dma: sifive_pdma: allow non-multiple transaction size transactions
[PULL,v2,01/21] target/riscv: Update the ePMP CSR address
- - 2 2
-
-
-
2021-09-21
Alistair Francis
New
[PULL,v2,15/21] hw/dma: sifive_pdma: claim bit must be set before DMA transactions
[PULL,v2,01/21] target/riscv: Update the ePMP CSR address
- - 1 2
-
-
-
2021-09-21
Alistair Francis
New
[PULL,v2,14/21] hw/dma: sifive_pdma: reset Next* registers when Control.claim is set
[PULL,v2,01/21] target/riscv: Update the ePMP CSR address
- - 1 2
-
-
-
2021-09-21
Alistair Francis
New
[PULL,v2,13/21] hw/riscv: virt: Add optional ACLINT support to virt machine
[PULL,v2,01/21] target/riscv: Update the ePMP CSR address
- - 2 -
-
-
-
2021-09-21
Alistair Francis
New
[PULL,v2,12/21] hw/riscv: virt: Re-factor FDT generation
[PULL,v2,01/21] target/riscv: Update the ePMP CSR address
- - 2 -
-
-
-
2021-09-21
Alistair Francis
New
[PULL,v2,11/21] hw/intc: Upgrade the SiFive CLINT implementation to RISC-V ACLINT
[PULL,v2,01/21] target/riscv: Update the ePMP CSR address
- - 2 -
-
-
-
2021-09-21
Alistair Francis
New
[PULL,v2,10/21] hw/intc: Rename sifive_clint sources to riscv_aclint sources
[PULL,v2,01/21] target/riscv: Update the ePMP CSR address
- - 2 -
-
-
-
2021-09-21
Alistair Francis
New
[PULL,v2,09/21] sifive_u: Connect the SiFive PWM device
[PULL,v2,01/21] target/riscv: Update the ePMP CSR address
- - 1 -
-
-
-
2021-09-21
Alistair Francis
New
[PULL,v2,08/21] hw/timer: Add SiFive PWM support
[PULL,v2,01/21] target/riscv: Update the ePMP CSR address
- - 1 -
-
-
-
2021-09-21
Alistair Francis
New
[PULL,v2,07/21] hw/intc: ibex_timer: Convert the timer to use RISC-V CPU GPIO lines
[PULL,v2,01/21] target/riscv: Update the ePMP CSR address
- - 2 -
-
-
-
2021-09-21
Alistair Francis
New
[PULL,v2,06/21] hw/intc: sifive_plic: Convert the PLIC to use RISC-V CPU GPIO lines
[PULL,v2,01/21] target/riscv: Update the ePMP CSR address
- - 3 1
-
-
-
2021-09-21
Alistair Francis
New
[PULL,v2,05/21] hw/intc: ibex_plic: Convert the PLIC to use RISC-V CPU GPIO lines
[PULL,v2,01/21] target/riscv: Update the ePMP CSR address
- - 2 -
-
-
-
2021-09-21
Alistair Francis
New
[PULL,v2,04/21] hw/intc: sifive_clint: Use RISC-V CPU GPIO lines
[PULL,v2,01/21] target/riscv: Update the ePMP CSR address
- - 2 1
-
-
-
2021-09-21
Alistair Francis
New
[PULL,v2,03/21] target/riscv: Expose interrupt pending bits as GPIO lines
Untitled series #263278
- - 3 1
-
-
-
2021-09-21
Alistair Francis
New
[PULL,v2,02/21] target/riscv: Fix satp write
[PULL,v2,01/21] target/riscv: Update the ePMP CSR address
- - 2 -
-
-
-
2021-09-21
Alistair Francis
New
[PULL,v2,01/21] target/riscv: Update the ePMP CSR address
[PULL,v2,01/21] target/riscv: Update the ePMP CSR address
- - 1 -
-
-
-
2021-09-21
Alistair Francis
New
[PULL,v2,00/21] riscv-to-apply queue
- - - -
-
-
-
2021-09-21
Alistair Francis
New
[PULL,10/10] tcg/riscv: Remove add with zero on user-only memory access
[PULL,01/10] include/exec: Move cpu_signal_handler declaration
- - 2 -
-
-
-
2021-09-21
Richard Henderson
New
[PULL,09/10] hw/core: Make do_unaligned_access noreturn
[PULL,01/10] include/exec: Move cpu_signal_handler declaration
- - 3 -
-
-
-
2021-09-21
Richard Henderson
New
[PULL,08/10] tcg/sparc: Introduce tcg_out_mov_delay
[PULL,01/10] include/exec: Move cpu_signal_handler declaration
- - 1 -
-
-
-
2021-09-21
Richard Henderson
New
[PULL,07/10] tcg/sparc: Drop inline markers
[PULL,01/10] include/exec: Move cpu_signal_handler declaration
- - 1 -
-
-
-
2021-09-21
Richard Henderson
New
[PULL,06/10] tcg/mips: Drop special alignment for code_gen_buffer
[PULL,01/10] include/exec: Move cpu_signal_handler declaration
- - 1 -
-
-
-
2021-09-21
Richard Henderson
New
[PULL,05/10] tcg/mips: Unset TCG_TARGET_HAS_direct_jump
[PULL,01/10] include/exec: Move cpu_signal_handler declaration
- - 1 -
-
-
-
2021-09-21
Richard Henderson
New
[PULL,04/10] tcg/mips: Allow JAL to be out of range in tcg_out_bswap_subr
[PULL,01/10] include/exec: Move cpu_signal_handler declaration
- - 1 -
-
-
-
2021-09-21
Richard Henderson
New
[PULL,03/10] tcg/mips: Drop inline markers
[PULL,01/10] include/exec: Move cpu_signal_handler declaration
- - 1 -
-
-
-
2021-09-21
Richard Henderson
New
[PULL,02/10] accel/tcg: Restrict cpu_handle_halt() to sysemu
[PULL,01/10] include/exec: Move cpu_signal_handler declaration
- - 1 -
-
-
-
2021-09-21
Richard Henderson
New
[PULL,01/10] include/exec: Move cpu_signal_handler declaration
[PULL,01/10] include/exec: Move cpu_signal_handler declaration
- - 3 -
-
-
-
2021-09-21
Richard Henderson
New
[PULL,00/10] tcg patch queue, v2
- - - -
-
-
-
2021-09-21
Richard Henderson
New
[v3] target/riscv: Set mstatus_hs.[SD|FS] bits if Clean and V=1 in mark_fs_dirty()
[v3] target/riscv: Set mstatus_hs.[SD|FS] bits if Clean and V=1 in mark_fs_dirty()
- - 3 1
-
-
-
2021-09-21
Frank Chang
New
[v3,9/9] vfio: defer to commit kvm irq routing when enable msi/msix
optimize the downtime for vfio migration
- - - -
-
-
-
2021-09-20
Longpeng (Mike, Cloud Infrastructure Service Product Dept.)
New
[v3,8/9] Revert "vfio: Avoid disabling and enabling vectors repeatedly in VFIO migration"
optimize the downtime for vfio migration
- - - -
-
-
-
2021-09-20
Longpeng (Mike, Cloud Infrastructure Service Product Dept.)
New
[v3,7/9] vfio: add infrastructure to commit the deferred kvm routing
optimize the downtime for vfio migration
- - - -
-
-
-
2021-09-20
Longpeng (Mike, Cloud Infrastructure Service Product Dept.)
New
[v3,6/9] kvm: irqchip: extract kvm_irqchip_add_deferred_msi_route
optimize the downtime for vfio migration
- - - -
-
-
-
2021-09-20
Longpeng (Mike, Cloud Infrastructure Service Product Dept.)
New
[v3,5/9] msix: reset poll_notifier to NULL if fail to set notifiers
optimize the downtime for vfio migration
- - - -
-
-
-
2021-09-20
Longpeng (Mike, Cloud Infrastructure Service Product Dept.)
New
[v3,4/9] msix: simplify the conditional in msix_set/unset_vector_notifiers
optimize the downtime for vfio migration
- - - -
-
-
-
2021-09-20
Longpeng (Mike, Cloud Infrastructure Service Product Dept.)
New
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