Show patches with: Series = target/riscv: Convert to decodetree       |    State = Action Required       |    Archived = No       |   35 patches
Patch Series A/F/R/T S/W/F Date Submitter Delegate State
[v3,35/35] target/riscv: Remaining rvc insn reuse 32 bit translators target/riscv: Convert to decodetree - - 1 - --- 2018-10-31 Bastian Koppelmann New
[v3,34/35] target/riscv: Splice remaining compressed insn pairs for riscv32 vs riscv64 target/riscv: Convert to decodetree - - 1 - --- 2018-10-31 Bastian Koppelmann New
[v3,33/35] target/riscv: Splice fsw_sd and flw_ld for riscv32 vs riscv64 target/riscv: Convert to decodetree - - 1 - --- 2018-10-31 Bastian Koppelmann New
[v3,32/35] target/riscv: Convert @cl_d, @cl_w, @cs_d, @cs_w insns target/riscv: Convert to decodetree - - 1 - --- 2018-10-31 Bastian Koppelmann New
[v3,31/35] target/riscv: Convert @cs_2 insns to share translation functions target/riscv: Convert to decodetree - - 1 - --- 2018-10-31 Bastian Koppelmann New
[v3,30/35] target/riscv: Remove decode_RV32_64G() target/riscv: Convert to decodetree - - 1 - --- 2018-10-31 Bastian Koppelmann New
[v3,29/35] target/riscv: Remove gen_system() target/riscv: Convert to decodetree - - 1 - --- 2018-10-31 Bastian Koppelmann New
[v3,28/35] target/riscv: Rename trans_arith to gen_arith target/riscv: Convert to decodetree - - 1 - --- 2018-10-31 Bastian Koppelmann New
[v3,27/35] target/riscv: Remove manual decoding of RV32/64M insn target/riscv: Convert to decodetree - - 1 - --- 2018-10-31 Bastian Koppelmann New
[v3,26/35] target/riscv: Remove shift and slt insn manual decoding target/riscv: Convert to decodetree - - 1 - --- 2018-10-31 Bastian Koppelmann New
[v3,25/35] target/riscv: make ADD/SUB/OR/XOR/AND insn use arg lists target/riscv: Convert to decodetree - - 1 - --- 2018-10-31 Bastian Koppelmann New
[v3,24/35] target/riscv: Move gen_arith_imm() decoding into trans_* functions target/riscv: Convert to decodetree - - - - --- 2018-10-31 Bastian Koppelmann New
[v3,23/35] target/riscv: Remove manual decoding from gen_store() target/riscv: Convert to decodetree - - 1 - --- 2018-10-31 Bastian Koppelmann New
[v3,22/35] target/riscv: Remove manual decoding from gen_load() target/riscv: Convert to decodetree - - 2 - --- 2018-10-31 Bastian Koppelmann New
[v3,21/35] target/riscv: Remove manual decoding from gen_branch() target/riscv: Convert to decodetree - - 1 - --- 2018-10-31 Bastian Koppelmann New
[v3,20/35] target/riscv: Remove gen_jalr() target/riscv: Convert to decodetree 1 - 1 - --- 2018-10-31 Bastian Koppelmann New
[v3,19/35] target/riscv: Convert quadrant 2 of RVXC insns to decodetree target/riscv: Convert to decodetree - - - - --- 2018-10-31 Bastian Koppelmann New
[v3,18/35] target/riscv: Convert quadrant 1 of RVXC insns to decodetree target/riscv: Convert to decodetree - - 1 - --- 2018-10-31 Bastian Koppelmann New
[v3,17/35] target/riscv: Convert quadrant 0 of RVXC insns to decodetree target/riscv: Convert to decodetree - - 1 - --- 2018-10-31 Bastian Koppelmann New
[v3,16/35] target/riscv: Convert RV priv insns to decodetree target/riscv: Convert to decodetree - - 1 - --- 2018-10-31 Bastian Koppelmann New
[v3,15/35] target/riscv: Convert RV64D insns to decodetree target/riscv: Convert to decodetree - - 1 - --- 2018-10-31 Bastian Koppelmann New
[v3,14/35] target/riscv: Convert RV32D insns to decodetree target/riscv: Convert to decodetree - - 1 - --- 2018-10-31 Bastian Koppelmann New
[v3,13/35] target/riscv: Convert RV64F insns to decodetree target/riscv: Convert to decodetree - - 1 - --- 2018-10-31 Bastian Koppelmann New
[v3,12/35] target/riscv: Convert RV32F insns to decodetree target/riscv: Convert to decodetree - - 1 - --- 2018-10-31 Bastian Koppelmann New
[v3,11/35] target/riscv: Convert RV64A insns to decodetree target/riscv: Convert to decodetree 1 - 1 - --- 2018-10-31 Bastian Koppelmann New
[v3,10/35] target/riscv: Convert RV32A insns to decodetree target/riscv: Convert to decodetree - - 1 - --- 2018-10-31 Bastian Koppelmann New
[v3,09/35] target/riscv: Convert RVXM insns to decodetree target/riscv: Convert to decodetree 1 - 1 - --- 2018-10-31 Bastian Koppelmann New
[v3,08/35] target/riscv: Convert RVXI csr insns to decodetree target/riscv: Convert to decodetree 1 - 1 - --- 2018-10-31 Bastian Koppelmann New
[v3,07/35] target/riscv: Convert RVXI fence insns to decodetree target/riscv: Convert to decodetree 1 - 1 - --- 2018-10-31 Bastian Koppelmann New
[v3,06/35] target/riscv: Convert RVXI arithmetic insns to decodetree target/riscv: Convert to decodetree 1 - 1 - --- 2018-10-31 Bastian Koppelmann New
[v3,05/35] target/riscv: Convert RV64I load/store insns to decodetree target/riscv: Convert to decodetree 1 - 1 - --- 2018-10-31 Bastian Koppelmann New
[v3,04/35] target/riscv: Convert RV32I load/store insns to decodetree target/riscv: Convert to decodetree - - - - --- 2018-10-31 Bastian Koppelmann New
[v3,03/35] target/riscv: Convert RVXI branch insns to decodetree target/riscv: Convert to decodetree - - 2 - --- 2018-10-31 Bastian Koppelmann New
[v3,02/35] target/riscv: Activate decodetree and implemnt LUI & AUIPC target/riscv: Convert to decodetree 1 - 1 - --- 2018-10-31 Bastian Koppelmann New
[v3,01/35] target/riscv: Move CPURISCVState pointer to DisasContext target/riscv: Convert to decodetree - - 3 - --- 2018-10-31 Bastian Koppelmann New