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[v2,01/16] hw/riscv: Select MSI_NONBROKEN in SIFIVE_PLIC
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| 16 patches
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Apply
Patch
Series
A/F/R/T
S/W/F
Date
Submitter
Delegate
State
[v2,16/16] hw/intc: sifive_plic: Fix the pending register range check
[v2,01/16] hw/riscv: Select MSI_NONBROKEN in SIFIVE_PLIC
- 1 1 -
-
-
-
2022-12-07
Bin Meng
New
[v2,15/16] hw/riscv: opentitan: Drop "hartid-base" and "priority-base" initialization
[v2,01/16] hw/riscv: Select MSI_NONBROKEN in SIFIVE_PLIC
- - 1 -
-
-
-
2022-12-07
Bin Meng
New
[v2,14/16] hw/intc: sifive_plic: Change "priority-base" to start from interrupt source 0
[v2,01/16] hw/riscv: Select MSI_NONBROKEN in SIFIVE_PLIC
- - 2 -
-
-
-
2022-12-07
Bin Meng
New
[v2,13/16] hw/riscv: virt: Fix the value of "riscv, ndev" in the dtb
[v2,01/16] hw/riscv: Select MSI_NONBROKEN in SIFIVE_PLIC
- 1 1 -
-
-
-
2022-12-07
Bin Meng
New
[v2,12/16] hw/riscv: sifive_u: Avoid using magic number for "riscv, ndev"
[v2,01/16] hw/riscv: Select MSI_NONBROKEN in SIFIVE_PLIC
- - 2 -
-
-
-
2022-12-07
Bin Meng
New
[v2,11/16] hw/riscv: sifive_e: Fix the number of interrupt sources of PLIC
[v2,01/16] hw/riscv: Select MSI_NONBROKEN in SIFIVE_PLIC
- 1 2 -
-
-
-
2022-12-07
Bin Meng
New
[v2,10/16] hw/riscv: microchip_pfsoc: Fix the number of interrupt sources of PLIC
[v2,01/16] hw/riscv: Select MSI_NONBROKEN in SIFIVE_PLIC
- 1 3 -
-
-
-
2022-12-07
Bin Meng
New
[v2,09/16] hw/intc: sifive_plic: Update "num-sources" property default value
[v2,01/16] hw/riscv: Select MSI_NONBROKEN in SIFIVE_PLIC
- - 1 -
-
-
-
2022-12-07
Bin Meng
New
[v2,08/16] hw/intc: sifive_plic: Use error_setg() to propagate the error up via errp in sifive_plic…
[v2,01/16] hw/riscv: Select MSI_NONBROKEN in SIFIVE_PLIC
- - 2 -
-
-
-
2022-12-07
Bin Meng
New
[v2,07/16] hw/intc: sifive_plic: Improve robustness of the PLIC config parser
[v2,01/16] hw/riscv: Select MSI_NONBROKEN in SIFIVE_PLIC
1 - - -
-
-
-
2022-12-07
Bin Meng
New
[v2,06/16] hw/intc: sifive_plic: Drop PLICMode_H
[v2,01/16] hw/riscv: Select MSI_NONBROKEN in SIFIVE_PLIC
- - 2 -
-
-
-
2022-12-07
Bin Meng
New
[v2,05/16] hw/riscv: spike: Remove misleading comments
[v2,01/16] hw/riscv: Select MSI_NONBROKEN in SIFIVE_PLIC
- - 2 -
-
-
-
2022-12-07
Bin Meng
New
[v2,04/16] hw/riscv: Sort machines Kconfig options in alphabetical order
[v2,01/16] hw/riscv: Select MSI_NONBROKEN in SIFIVE_PLIC
- - 3 -
-
-
-
2022-12-07
Bin Meng
New
[v2,03/16] hw/riscv: Fix opentitan dependency to SIFIVE_PLIC
[v2,01/16] hw/riscv: Select MSI_NONBROKEN in SIFIVE_PLIC
- - 2 -
-
-
-
2022-12-07
Bin Meng
New
[v2,02/16] hw/intc: Select MSI_NONBROKEN in RISC-V AIA interrupt controllers
[v2,01/16] hw/riscv: Select MSI_NONBROKEN in SIFIVE_PLIC
- - 2 -
-
-
-
2022-12-07
Bin Meng
New
[v2,01/16] hw/riscv: Select MSI_NONBROKEN in SIFIVE_PLIC
[v2,01/16] hw/riscv: Select MSI_NONBROKEN in SIFIVE_PLIC
- - 3 -
-
-
-
2022-12-07
Bin Meng
New