Show patches with: Series = [PULL,01/36] hw/isa/piix4: Use qdev_get_gpio_in_named() to get ISA IRQ       |    State = Action Required       |    Archived = No       |   36 patches
Patch Series A/F/R/T S/W/F Date Submitter Delegate State
[PULL,36/36] gitlab-ci: Add KVM mips64el cross-build jobs [PULL,01/36] hw/isa/piix4: Use qdev_get_gpio_in_named() to get ISA IRQ 1 - 2 - --- 2021-05-02 Philippe Mathieu-Daudé New
[PULL,35/36] hw/mips: Restrict non-virtualized machines to TCG [PULL,01/36] hw/isa/piix4: Use qdev_get_gpio_in_named() to get ISA IRQ - - 1 - --- 2021-05-02 Philippe Mathieu-Daudé New
[PULL,34/36] target/mips: Move TCG source files under tcg/ sub directory [PULL,01/36] hw/isa/piix4: Use qdev_get_gpio_in_named() to get ISA IRQ - - 1 - --- 2021-05-02 Philippe Mathieu-Daudé New
[PULL,33/36] target/mips: Move CP0 helpers to sysemu/cp0.c [PULL,01/36] hw/isa/piix4: Use qdev_get_gpio_in_named() to get ISA IRQ - - 1 - --- 2021-05-02 Philippe Mathieu-Daudé New
[PULL,32/36] target/mips: Move exception management code to exception.c [PULL,01/36] hw/isa/piix4: Use qdev_get_gpio_in_named() to get ISA IRQ - - 1 - --- 2021-05-02 Philippe Mathieu-Daudé New
[PULL,31/36] target/mips: Move TLB management helpers to tcg/sysemu/tlb_helper.c [PULL,01/36] hw/isa/piix4: Use qdev_get_gpio_in_named() to get ISA IRQ - - 1 - --- 2021-05-02 Philippe Mathieu-Daudé New
[PULL,30/36] target/mips: Move helper_cache() to tcg/sysemu/special_helper.c [PULL,01/36] hw/isa/piix4: Use qdev_get_gpio_in_named() to get ISA IRQ - - 1 - --- 2021-05-02 Philippe Mathieu-Daudé New
[PULL,29/36] target/mips: Move Special opcodes to tcg/sysemu/special_helper.c [PULL,01/36] hw/isa/piix4: Use qdev_get_gpio_in_named() to get ISA IRQ - - 1 - --- 2021-05-02 Philippe Mathieu-Daudé New
[PULL,28/36] target/mips: Restrict CPUMIPSTLBContext::map_address() handlers scope [PULL,01/36] hw/isa/piix4: Use qdev_get_gpio_in_named() to get ISA IRQ - - 1 - --- 2021-05-02 Philippe Mathieu-Daudé New
[PULL,27/36] target/mips: Move tlb_helper.c to tcg/sysemu/ [PULL,01/36] hw/isa/piix4: Use qdev_get_gpio_in_named() to get ISA IRQ - - 1 - --- 2021-05-02 Philippe Mathieu-Daudé New
[PULL,26/36] target/mips: Restrict mmu_init() to TCG [PULL,01/36] hw/isa/piix4: Use qdev_get_gpio_in_named() to get ISA IRQ - - 1 - --- 2021-05-02 Philippe Mathieu-Daudé New
[PULL,25/36] target/mips: Move sysemu TCG-specific code to tcg/sysemu/ subfolder [PULL,01/36] hw/isa/piix4: Use qdev_get_gpio_in_named() to get ISA IRQ - - 1 - --- 2021-05-02 Philippe Mathieu-Daudé New
[PULL,24/36] target/mips: Restrict cpu_mips_get_random() / update_pagemask() to TCG [PULL,01/36] hw/isa/piix4: Use qdev_get_gpio_in_named() to get ISA IRQ - - 1 - --- 2021-05-02 Philippe Mathieu-Daudé New
[PULL,23/36] target/mips: Move physical addressing code to sysemu/physaddr.c [PULL,01/36] hw/isa/piix4: Use qdev_get_gpio_in_named() to get ISA IRQ - - 1 - --- 2021-05-02 Philippe Mathieu-Daudé New
[PULL,22/36] target/mips: Move sysemu specific files under sysemu/ subfolder [PULL,01/36] hw/isa/piix4: Use qdev_get_gpio_in_named() to get ISA IRQ - - 1 - --- 2021-05-02 Philippe Mathieu-Daudé New
[PULL,21/36] target/mips: Move cpu_signal_handler definition around [PULL,01/36] hw/isa/piix4: Use qdev_get_gpio_in_named() to get ISA IRQ - - 1 - --- 2021-05-02 Philippe Mathieu-Daudé New
[PULL,20/36] target/mips: Add simple user-mode mips_cpu_tlb_fill() [PULL,01/36] hw/isa/piix4: Use qdev_get_gpio_in_named() to get ISA IRQ - - 1 - --- 2021-05-02 Philippe Mathieu-Daudé New
[PULL,19/36] target/mips: Add simple user-mode mips_cpu_do_interrupt() [PULL,01/36] hw/isa/piix4: Use qdev_get_gpio_in_named() to get ISA IRQ - - 1 - --- 2021-05-02 Philippe Mathieu-Daudé New
[PULL,18/36] target/mips: Introduce tcg-internal.h for TCG specific declarations [PULL,01/36] hw/isa/piix4: Use qdev_get_gpio_in_named() to get ISA IRQ - - 1 - --- 2021-05-02 Philippe Mathieu-Daudé New
[PULL,17/36] meson: Introduce meson_user_arch source set for arch-specific user-mode [PULL,01/36] hw/isa/piix4: Use qdev_get_gpio_in_named() to get ISA IRQ - - 1 - --- 2021-05-02 Philippe Mathieu-Daudé New
[PULL,16/36] target/mips: Extract load/store helpers to ldst_helper.c [PULL,01/36] hw/isa/piix4: Use qdev_get_gpio_in_named() to get ISA IRQ - - 1 - --- 2021-05-02 Philippe Mathieu-Daudé New
[PULL,15/36] target/mips: Merge do_translate_address into cpu_mips_translate_address [PULL,01/36] hw/isa/piix4: Use qdev_get_gpio_in_named() to get ISA IRQ - - 1 - --- 2021-05-02 Philippe Mathieu-Daudé New
[PULL,14/36] target/mips: Declare mips_env_set_pc() inlined in "internal.h" [PULL,01/36] hw/isa/piix4: Use qdev_get_gpio_in_named() to get ISA IRQ - - 1 - --- 2021-05-02 Philippe Mathieu-Daudé New
[PULL,13/36] target/mips: Turn printfpr() macro into a proper function [PULL,01/36] hw/isa/piix4: Use qdev_get_gpio_in_named() to get ISA IRQ - - 1 - --- 2021-05-02 Philippe Mathieu-Daudé New
[PULL,12/36] target/mips: Restrict mips_cpu_dump_state() to cpu.c [PULL,01/36] hw/isa/piix4: Use qdev_get_gpio_in_named() to get ISA IRQ - - 1 - --- 2021-05-02 Philippe Mathieu-Daudé New
[PULL,11/36] target/mips: Optimize CPU/FPU regnames[] arrays [PULL,01/36] hw/isa/piix4: Use qdev_get_gpio_in_named() to get ISA IRQ - - 1 - --- 2021-05-02 Philippe Mathieu-Daudé New
[PULL,10/36] target/mips: Make CPU/FPU regnames[] arrays global [PULL,01/36] hw/isa/piix4: Use qdev_get_gpio_in_named() to get ISA IRQ - - 1 - --- 2021-05-02 Philippe Mathieu-Daudé New
[PULL,09/36] target/mips: Move msa_reset() to new source file [PULL,01/36] hw/isa/piix4: Use qdev_get_gpio_in_named() to get ISA IRQ - - 1 - --- 2021-05-02 Philippe Mathieu-Daudé New
[PULL,08/36] target/mips: Move IEEE rounding mode array to new source file [PULL,01/36] hw/isa/piix4: Use qdev_get_gpio_in_named() to get ISA IRQ - - 1 - --- 2021-05-02 Philippe Mathieu-Daudé New
[PULL,07/36] target/mips: Simplify meson TCG rules [PULL,01/36] hw/isa/piix4: Use qdev_get_gpio_in_named() to get ISA IRQ - - 1 - --- 2021-05-02 Philippe Mathieu-Daudé New
[PULL,06/36] target/mips: Make check_cp0_enabled() return a boolean [PULL,01/36] hw/isa/piix4: Use qdev_get_gpio_in_named() to get ISA IRQ - - 1 - --- 2021-05-02 Philippe Mathieu-Daudé New
[PULL,05/36] target/mips: Migrate missing CPU fields [PULL,01/36] hw/isa/piix4: Use qdev_get_gpio_in_named() to get ISA IRQ 1 5 - - --- 2021-05-02 Philippe Mathieu-Daudé New
[PULL,04/36] target/mips: Remove spurious LOG_UNIMP of MTHC0 opcode [PULL,01/36] hw/isa/piix4: Use qdev_get_gpio_in_named() to get ISA IRQ - - 1 - --- 2021-05-02 Philippe Mathieu-Daudé New
[PULL,03/36] target/mips: Add missing CP0 check to nanoMIPS RDPGPR / WRPGPR opcodes [PULL,01/36] hw/isa/piix4: Use qdev_get_gpio_in_named() to get ISA IRQ - - 1 - --- 2021-05-02 Philippe Mathieu-Daudé New
[PULL,02/36] target/mips: Fix CACHEE opcode (CACHE using EVA addressing) [PULL,01/36] hw/isa/piix4: Use qdev_get_gpio_in_named() to get ISA IRQ - - 1 - --- 2021-05-02 Philippe Mathieu-Daudé New
[PULL,01/36] hw/isa/piix4: Use qdev_get_gpio_in_named() to get ISA IRQ [PULL,01/36] hw/isa/piix4: Use qdev_get_gpio_in_named() to get ISA IRQ - - 1 - --- 2021-05-02 Philippe Mathieu-Daudé New