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[PULL] RISC-V Patches for the 4.1 Soft Freeze, Part 2 v3
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| 32 patches
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jgarzik
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Apply
Patch
Series
A/F/R/T
S/W/F
Date
Submitter
Delegate
State
[PULL,32/32] hw/riscv: Extend the kernel loading support
[PULL] RISC-V Patches for the 4.1 Soft Freeze, Part 2 v3
- - 1 1
-
-
-
2019-07-03
Palmer Dabbelt
New
[PULL,31/32] hw/riscv: Add support for loading a firmware
[PULL] RISC-V Patches for the 4.1 Soft Freeze, Part 2 v3
- - 1 1
-
-
-
2019-07-03
Palmer Dabbelt
New
[PULL,30/32] hw/riscv: Split out the boot functions
[PULL] RISC-V Patches for the 4.1 Soft Freeze, Part 2 v3
- - 1 1
-
-
-
2019-07-03
Palmer Dabbelt
New
[PULL,29/32] riscv: sifive_u: Update the plic hart config to support multicore
[PULL] RISC-V Patches for the 4.1 Soft Freeze, Part 2 v3
- - 1 -
-
-
-
2019-07-03
Palmer Dabbelt
New
[PULL,28/32] riscv: sifive_u: Do not create hard-coded phandles in DT
[PULL] RISC-V Patches for the 4.1 Soft Freeze, Part 2 v3
- - 1 -
-
-
-
2019-07-03
Palmer Dabbelt
New
[PULL,27/32] disas/riscv: Fix `rdinstreth` constraint
[PULL] RISC-V Patches for the 4.1 Soft Freeze, Part 2 v3
- - 1 -
-
-
-
2019-07-03
Palmer Dabbelt
New
[PULL,26/32] disas/riscv: Disassemble reserved compressed encodings as illegal
[PULL] RISC-V Patches for the 4.1 Soft Freeze, Part 2 v3
- - 1 -
-
-
-
2019-07-03
Palmer Dabbelt
New
[PULL,25/32] riscv: virt: Add cpu-topology DT node.
[PULL] RISC-V Patches for the 4.1 Soft Freeze, Part 2 v3
- - 1 -
-
-
-
2019-07-03
Palmer Dabbelt
New
[PULL,24/32] RISC-V: Update syscall list for 32-bit support.
[PULL] RISC-V Patches for the 4.1 Soft Freeze, Part 2 v3
- - 1 -
-
-
-
2019-07-03
Palmer Dabbelt
New
[PULL,23/32] RISC-V: Clear load reservations on context switch and SC
[PULL] RISC-V Patches for the 4.1 Soft Freeze, Part 2 v3
- - 2 -
-
-
-
2019-07-03
Palmer Dabbelt
New
[PULL,22/32] RISC-V: Add support for the Zicsr extension
[PULL] RISC-V Patches for the 4.1 Soft Freeze, Part 2 v3
- - 1 -
-
-
-
2019-07-03
Palmer Dabbelt
New
[PULL,21/32] RISC-V: Add support for the Zifencei extension
[PULL] RISC-V Patches for the 4.1 Soft Freeze, Part 2 v3
- - 1 -
-
-
-
2019-07-03
Palmer Dabbelt
New
[PULL,20/32] target/riscv: Add support for disabling/enabling Counters
[PULL] RISC-V Patches for the 4.1 Soft Freeze, Part 2 v3
- - 1 -
-
-
-
2019-07-03
Palmer Dabbelt
New
[PULL,19/32] target/riscv: Remove user version information
[PULL] RISC-V Patches for the 4.1 Soft Freeze, Part 2 v3
- - 1 -
-
-
-
2019-07-03
Palmer Dabbelt
New
[PULL,18/32] target/riscv: Require either I or E base extension
[PULL] RISC-V Patches for the 4.1 Soft Freeze, Part 2 v3
- - 1 -
-
-
-
2019-07-03
Palmer Dabbelt
New
[PULL,17/32] qemu-deprecated.texi: Deprecate the RISC-V privledge spec 1.09.1
[PULL] RISC-V Patches for the 4.1 Soft Freeze, Part 2 v3
- - - -
-
-
-
2019-07-03
Palmer Dabbelt
New
[PULL,16/32] target/riscv: Set privledge spec 1.11.0 as default
[PULL] RISC-V Patches for the 4.1 Soft Freeze, Part 2 v3
- - 1 -
-
-
-
2019-07-03
Palmer Dabbelt
New
[PULL,15/32] target/riscv: Add the mcountinhibit CSR
[PULL] RISC-V Patches for the 4.1 Soft Freeze, Part 2 v3
- - 1 -
-
-
-
2019-07-03
Palmer Dabbelt
New
[PULL,14/32] target/riscv: Add the privledge spec version 1.11.0
[PULL] RISC-V Patches for the 4.1 Soft Freeze, Part 2 v3
- - 1 -
-
-
-
2019-07-03
Palmer Dabbelt
New
[PULL,13/32] target/riscv: Restructure deprecatd CPUs
[PULL] RISC-V Patches for the 4.1 Soft Freeze, Part 2 v3
- - 1 -
-
-
-
2019-07-03
Palmer Dabbelt
New
[PULL,12/32] RISC-V: Fix a memory leak when realizing a sifive_e
[PULL] RISC-V Patches for the 4.1 Soft Freeze, Part 2 v3
- 1 2 -
-
-
-
2019-07-03
Palmer Dabbelt
New
[PULL,11/32] riscv: virt: Correct pci "bus-range" encoding
[PULL] RISC-V Patches for the 4.1 Soft Freeze, Part 2 v3
- - 1 -
-
-
-
2019-07-03
Palmer Dabbelt
New
[PULL,10/32] RISC-V: Fix a PMP check with the correct access size
[PULL] RISC-V Patches for the 4.1 Soft Freeze, Part 2 v3
- - 1 -
-
-
-
2019-07-03
Palmer Dabbelt
New
[PULL,09/32] RISC-V: Fix a PMP bug where it succeeds even if PMP entry is off
[PULL] RISC-V Patches for the 4.1 Soft Freeze, Part 2 v3
- - 1 -
-
-
-
2019-07-03
Palmer Dabbelt
New
[PULL,08/32] RISC-V: Check PMP during Page Table Walks
[PULL] RISC-V Patches for the 4.1 Soft Freeze, Part 2 v3
- - 1 -
-
-
-
2019-07-03
Palmer Dabbelt
New
[PULL,07/32] RISC-V: Check for the effective memory privilege mode during PMP checks
[PULL] RISC-V Patches for the 4.1 Soft Freeze, Part 2 v3
- - 1 -
-
-
-
2019-07-03
Palmer Dabbelt
New
[PULL,06/32] RISC-V: Raise access fault exceptions on PMP violations
[PULL] RISC-V Patches for the 4.1 Soft Freeze, Part 2 v3
- - 1 -
-
-
-
2019-07-03
Palmer Dabbelt
New
[PULL,05/32] RISC-V: Only Check PMP if MMU translation succeeds
[PULL] RISC-V Patches for the 4.1 Soft Freeze, Part 2 v3
- - 1 -
-
-
-
2019-07-03
Palmer Dabbelt
New
[PULL,04/32] target/riscv: Implement riscv_cpu_unassigned_access
[PULL] RISC-V Patches for the 4.1 Soft Freeze, Part 2 v3
- - 1 -
-
-
-
2019-07-03
Palmer Dabbelt
New
[PULL,03/32] target/riscv: Fix PMP range boundary address bug
[PULL] RISC-V Patches for the 4.1 Soft Freeze, Part 2 v3
- - 2 -
-
-
-
2019-07-03
Palmer Dabbelt
New
[PULL,02/32] sifive_prci: Read and write PRCI registers
[PULL] RISC-V Patches for the 4.1 Soft Freeze, Part 2 v3
- - 1 -
-
-
-
2019-07-03
Palmer Dabbelt
New
[PULL] RISC-V Patches for the 4.1 Soft Freeze, Part 2 v3
[PULL] RISC-V Patches for the 4.1 Soft Freeze, Part 2 v3
- - - -
-
-
-
2019-07-03
Palmer Dabbelt
New