Toggle navigation
Patchwork
QEMU Development
Patches
Bundles
About this project
Login
Register
Mail settings
Show patches with
: Series =
[PULL,01/48] target/arm: Vectorize USHL and SSHL
| State =
Action Required
| Archived =
No
| 47 patches
Series
Submitter
State
any
Action Required
New
Under Review
Accepted
Rejected
RFC
Not Applicable
Changes Requested
Awaiting Upstream
Superseded
Deferred
Needs Review / ACK
Handled Elsewhere
Search
Archived
No
Yes
Both
Delegate
------
Nobody
jgarzik
arnd
ymano
smfrench
jlayton
tseliot
ogasawara
amitk
awhitcroft
mst
dayangkun
jwboyer
jwboyer
colinking
colinking
azummo
dwmw2
rtg
sconklin
smb
aliguori
bradf
galak
galak
demarchi
ms
bhundven
chbs
kengyu
kadlec
pdp
regit
jabk
laforge
laforge
tonyb
sfr
alai
zecke
zecke
__damien__
luka
luka
prafulla@marvell.com
cyrus
PeterHuewe
kiho
jow
jow
ypwong
nico
dedeckeh
dedeckeh
yousong
yousong
tomcwarren
mb
mrchuck
vineetg76
computersforpeace
Noltari
Noltari
patrick_delaunay
ee07b291
ldir
ldir
stefanct
zhouhan
carldani
blp
ffainelli
ffainelli
regXboi
bbrezillon
pravin
mkp
jpettit
phil
mkresin
mkresin
thess
thess
fbarrat
fbarrat
linville
jesse
tjaalton
esben
abrodkin
abrodkin
diproiettod
tbot
stephenfin
vriera
darball1
sammj
ajd
jogo
jogo
bhelgaas
blogic
blogic
tagr
tagr
tagr
oohal
russellb
ptomsich
agraf
joestringer
davem
davem
davem
mwalle
naveen
pchotard
pepe2k
pepe2k
arj
arj
andmur01
amitay
matttbe
pabeni
istokes
aparcar
Ansuel
goliath
martineau
tytso
danielschwierzeck
mkorpershoek
mariosix
dcaratti
ovsrobot
ovsrobot
aserdean
XiaoYang
khem
hs
tpetazzoni
marex
liwang
robimarko
apritzel
danielhb
groug
mmichelson
npiggin
pareddja
atishp
netdrv
mkubecek
stintel
stintel
jkicinski
cpitchen
maximeh
dsa
jstancek
pm215
bpf
jonhunter
shettyg
lorpie01
acelan
wigyori
wigyori
apopple
dja
alexhung
lynxis
lynxis
brgl
brgl
peda
akodanev
narmstrong
981213
0andriy
chunkeey
snowpatch_ozlabs
snowpatch_ozlabs
snowpatch_ozlabs
aivanov
atishp04
shemminger
blocktrron
monstr
vigneshr
horms
mraynal
stewart
stewart
freenix
prom
rfried
wsa
akumar
xypron
ehristev
Jaehoon
jacmet
ivanhu
rsalvaterra
adrianschmutzler
sjg
hegdevasant
hegdevasant
metan
bmeng
jagan
ukleinek
ukleinek
ag
rmilecki
rmilecki
kevery
kabel
arbab
abelloni
trini
rw
rw
apconole
pablo
pablo
wbx
Hauke
Hauke
legoater
legoater
legoater
chleroy
svanheule
bjonglez
ynezz
aik
sbabic
sbabic
pevik
xback
xback
richiejp
dangole
dangole
forty
echaudron
benh
rgrimm
next_ghost
anuppatel
anuppatel
acer
segher
pratyush
passgat
jms
jms
jms
mans0n
ruscur
jk
jk
jk
jk
numans
xuyang
jmberg
Andes
festevam
linusw
linusw
ymorin
ymorin
matthias_bgg
tambarus
stroese
kubu
apalos
dceara
strlen
strlen
pbrobinson
imaximets
spectrum
cazzacarna
neocturne
aldot
TIENFONG
mpe
ktraynor
arnout
robh
nbd
nbd
anguy11
calebccff
paulus
jm
Apply
Patch
Series
A/F/R/T
S/W/F
Date
Submitter
Delegate
State
[PULL,48/48] target/arm: Fix short-vector increment behaviour
[PULL,01/48] target/arm: Vectorize USHL and SSHL
- - 1 -
-
-
-
2019-06-13
Peter Maydell
New
[PULL,47/48] target/arm: Convert float-to-integer VCVT insns to decodetree
[PULL,01/48] target/arm: Vectorize USHL and SSHL
- - 1 -
-
-
-
2019-06-13
Peter Maydell
New
[PULL,46/48] target/arm: Convert VCVT fp/fixed-point conversion insns to decodetree
[PULL,01/48] target/arm: Vectorize USHL and SSHL
- - 1 -
-
-
-
2019-06-13
Peter Maydell
New
[PULL,45/48] target/arm: Convert VJCVT to decodetree
[PULL,01/48] target/arm: Vectorize USHL and SSHL
- - 1 -
-
-
-
2019-06-13
Peter Maydell
New
[PULL,44/48] target/arm: Convert integer-to-float insns to decodetree
[PULL,01/48] target/arm: Vectorize USHL and SSHL
- - 1 -
-
-
-
2019-06-13
Peter Maydell
New
[PULL,43/48] target/arm: Convert double-single precision conversion insns to decodetree
[PULL,01/48] target/arm: Vectorize USHL and SSHL
- - 1 -
-
-
-
2019-06-13
Peter Maydell
New
[PULL,42/48] target/arm: Convert VFP round insns to decodetree
[PULL,01/48] target/arm: Vectorize USHL and SSHL
- - 1 -
-
-
-
2019-06-13
Peter Maydell
New
[PULL,41/48] target/arm: Convert the VCVT-to-f16 insns to decodetree
[PULL,01/48] target/arm: Vectorize USHL and SSHL
- - 1 -
-
-
-
2019-06-13
Peter Maydell
New
[PULL,40/48] target/arm: Convert the VCVT-from-f16 insns to decodetree
[PULL,01/48] target/arm: Vectorize USHL and SSHL
- - 1 -
-
-
-
2019-06-13
Peter Maydell
New
[PULL,39/48] target/arm: Convert VFP comparison insns to decodetree
[PULL,01/48] target/arm: Vectorize USHL and SSHL
- - 1 -
-
-
-
2019-06-13
Peter Maydell
New
[PULL,38/48] target/arm: Convert VMOV (register) to decodetree
[PULL,01/48] target/arm: Vectorize USHL and SSHL
- - 1 -
-
-
-
2019-06-13
Peter Maydell
New
[PULL,37/48] target/arm: Convert VSQRT to decodetree
[PULL,01/48] target/arm: Vectorize USHL and SSHL
- - 1 -
-
-
-
2019-06-13
Peter Maydell
New
[PULL,36/48] target/arm: Convert VNEG to decodetree
[PULL,01/48] target/arm: Vectorize USHL and SSHL
- - 1 -
-
-
-
2019-06-13
Peter Maydell
New
[PULL,35/48] target/arm: Convert VABS to decodetree
[PULL,01/48] target/arm: Vectorize USHL and SSHL
- - 1 -
-
-
-
2019-06-13
Peter Maydell
New
[PULL,34/48] target/arm: Convert VMOV (imm) to decodetree
[PULL,01/48] target/arm: Vectorize USHL and SSHL
- - 1 -
-
-
-
2019-06-13
Peter Maydell
New
[PULL,33/48] target/arm: Convert VFP fused multiply-add insns to decodetree
[PULL,01/48] target/arm: Vectorize USHL and SSHL
- - 1 -
-
-
-
2019-06-13
Peter Maydell
New
[PULL,32/48] target/arm: Convert VDIV to decodetree
[PULL,01/48] target/arm: Vectorize USHL and SSHL
- - 1 -
-
-
-
2019-06-13
Peter Maydell
New
[PULL,31/48] target/arm: Convert VSUB to decodetree
[PULL,01/48] target/arm: Vectorize USHL and SSHL
- - 1 -
-
-
-
2019-06-13
Peter Maydell
New
[PULL,30/48] target/arm: Convert VADD to decodetree
[PULL,01/48] target/arm: Vectorize USHL and SSHL
- - 1 -
-
-
-
2019-06-13
Peter Maydell
New
[PULL,29/48] target/arm: Convert VNMUL to decodetree
[PULL,01/48] target/arm: Vectorize USHL and SSHL
- - 1 -
-
-
-
2019-06-13
Peter Maydell
New
[PULL,28/48] target/arm: Convert VMUL to decodetree
[PULL,01/48] target/arm: Vectorize USHL and SSHL
- - 1 -
-
-
-
2019-06-13
Peter Maydell
New
[PULL,27/48] target/arm: Convert VFP VNMLA to decodetree
[PULL,01/48] target/arm: Vectorize USHL and SSHL
- - 1 -
-
-
-
2019-06-13
Peter Maydell
New
[PULL,26/48] target/arm: Convert VFP VNMLS to decodetree
[PULL,01/48] target/arm: Vectorize USHL and SSHL
- - 1 -
-
-
-
2019-06-13
Peter Maydell
New
[PULL,25/48] target/arm: Convert VFP VMLS to decodetree
[PULL,01/48] target/arm: Vectorize USHL and SSHL
- - 1 -
-
-
-
2019-06-13
Peter Maydell
New
[PULL,24/48] target/arm: Convert VFP VMLA to decodetree
[PULL,01/48] target/arm: Vectorize USHL and SSHL
- - 1 -
-
-
-
2019-06-13
Peter Maydell
New
[PULL,23/48] target/arm: Remove VLDR/VSTR/VLDM/VSTM use of cpu_F0s and cpu_F0d
[PULL,01/48] target/arm: Vectorize USHL and SSHL
- - 1 -
-
-
-
2019-06-13
Peter Maydell
New
[PULL,22/48] target/arm: Convert the VFP load/store multiple insns to decodetree
[PULL,01/48] target/arm: Vectorize USHL and SSHL
- - 1 -
-
-
-
2019-06-13
Peter Maydell
New
[PULL,21/48] target/arm: Convert VFP VLDR and VSTR to decodetree
[PULL,01/48] target/arm: Vectorize USHL and SSHL
- - 1 -
-
-
-
2019-06-13
Peter Maydell
New
[PULL,20/48] target/arm: Convert VFP two-register transfer insns to decodetree
[PULL,01/48] target/arm: Vectorize USHL and SSHL
- - 1 -
-
-
-
2019-06-13
Peter Maydell
New
[PULL,19/48] target/arm: Convert "single-precision" register moves to decodetree
[PULL,01/48] target/arm: Vectorize USHL and SSHL
- - 1 -
-
-
-
2019-06-13
Peter Maydell
New
[PULL,18/48] target/arm: Convert "double-precision" register moves to decodetree
[PULL,01/48] target/arm: Vectorize USHL and SSHL
- - 1 -
-
-
-
2019-06-13
Peter Maydell
New
[PULL,17/48] target/arm: Add helpers for VFP register loads and stores
[PULL,01/48] target/arm: Vectorize USHL and SSHL
- - 1 -
-
-
-
2019-06-13
Peter Maydell
New
[PULL,16/48] target/arm: Move the VFP trans_* functions to translate-vfp.inc.c
[PULL,01/48] target/arm: Vectorize USHL and SSHL
- - 1 -
-
-
-
2019-06-13
Peter Maydell
New
[PULL,15/48] target/arm: Convert VCVTA/VCVTN/VCVTP/VCVTM to decodetree
[PULL,01/48] target/arm: Vectorize USHL and SSHL
- - 1 -
-
-
-
2019-06-13
Peter Maydell
New
[PULL,14/48] target/arm: Convert VRINTA/VRINTN/VRINTP/VRINTM to decodetree
[PULL,01/48] target/arm: Vectorize USHL and SSHL
- - - -
-
-
-
2019-06-13
Peter Maydell
New
[PULL,13/48] target/arm: Convert VMINNM, VMAXNM to decodetree
[PULL,01/48] target/arm: Vectorize USHL and SSHL
- - 1 -
-
-
-
2019-06-13
Peter Maydell
New
[PULL,12/48] target/arm: Convert the VSEL instructions to decodetree
[PULL,01/48] target/arm: Vectorize USHL and SSHL
- - 1 -
-
-
-
2019-06-13
Peter Maydell
New
[PULL,11/48] target/arm: Explicitly enable VFP short-vectors for aarch32 -cpu max
[PULL,01/48] target/arm: Vectorize USHL and SSHL
- - 1 -
-
-
-
2019-06-13
Peter Maydell
New
[PULL,10/48] target/arm: Fix Cortex-R5F MVFR values
[PULL,01/48] target/arm: Vectorize USHL and SSHL
- - 1 -
-
-
-
2019-06-13
Peter Maydell
New
[PULL,09/48] target/arm: Factor out VFP access checking code
[PULL,01/48] target/arm: Vectorize USHL and SSHL
- - 1 -
-
-
-
2019-06-13
Peter Maydell
New
[PULL,08/48] target/arm: Add stubs for AArch32 VFP decodetree
[PULL,01/48] target/arm: Vectorize USHL and SSHL
- - 1 -
-
-
-
2019-06-13
Peter Maydell
New
[PULL,07/48] decodetree: Fix comparison of Field
[PULL,01/48] target/arm: Vectorize USHL and SSHL
- - 2 -
-
-
-
2019-06-13
Peter Maydell
New
[PULL,05/48] hw/core/bus.c: Only the main system bus can have no parent
[PULL,01/48] target/arm: Vectorize USHL and SSHL
- - 3 1
-
-
-
2019-06-13
Peter Maydell
New
[PULL,04/48] hw/arm/smmuv3: Fix decoding of ID register range
[PULL,01/48] target/arm: Vectorize USHL and SSHL
- - 1 -
-
-
-
2019-06-13
Peter Maydell
New
[PULL,03/48] target/arm: Implement NSACR gating of floating point
[PULL,01/48] target/arm: Vectorize USHL and SSHL
- - 1 -
-
-
-
2019-06-13
Peter Maydell
New
[PULL,02/48] target/arm: Use tcg_gen_gvec_bitsel
[PULL,01/48] target/arm: Vectorize USHL and SSHL
- - 1 -
-
-
-
2019-06-13
Peter Maydell
New
[PULL,01/48] target/arm: Vectorize USHL and SSHL
[PULL,01/48] target/arm: Vectorize USHL and SSHL
- - 1 -
-
-
-
2019-06-13
Peter Maydell
New