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Patch
Series
A/F/R/T
S/W/F
Date
Submitter
Delegate
State
[v1,1/2] hw/arm: versal: Add support for the LPD ADMAs
hw/arm: versal: Add the LPD zDMAs
- - 3 -
-
-
-
2020-02-27
Edgar E. Iglesias
New
[v1,1/1] hw/arm: versal: Add the CRP as unimplemented
hw/arm: versal: Add the CRP as unimplemented
- - 2 -
-
-
-
2019-11-15
Edgar E. Iglesias
New
[PULL,v1,3/3] target/microblaze: Plug temp leak around eval_cond_jmp()
MicroBlaze fixes
- - 4 -
-
-
-
2019-11-12
Edgar E. Iglesias
New
[PULL,v1,2/3] target/microblaze: Plug temp leaks with delay slot setup
MicroBlaze fixes
- - 4 -
-
-
-
2019-11-12
Edgar E. Iglesias
New
[PULL,v1,1/3] target/microblaze: Plug temp leaks for loads/stores
MicroBlaze fixes
- - 3 -
-
-
-
2019-11-12
Edgar E. Iglesias
New
[v2,3/3] target/microblaze: Plug temp leak around eval_cond_jmp()
target/microblaze: Plug tcg temp leaks
- - 4 -
-
-
-
2019-11-08
Edgar E. Iglesias
New
[v2,2/3] target/microblaze: Plug temp leaks with delay slot setup
target/microblaze: Plug tcg temp leaks
- - 4 -
-
-
-
2019-11-08
Edgar E. Iglesias
New
[v2,1/3] target/microblaze: Plug temp leaks for loads/stores
target/microblaze: Plug tcg temp leaks
- - 3 -
-
-
-
2019-11-08
Edgar E. Iglesias
New
[v1,3/3] target/microblaze: Plug temp leak around eval_cond_jmp()
target/microblaze: Plug tcg temp leaks
- - 4 -
-
-
-
2019-11-06
Edgar E. Iglesias
New
[v1,2/3] target/microblaze: Plug temp leaks with delay slot setup
target/microblaze: Plug tcg temp leaks
- - 4 -
-
-
-
2019-11-06
Edgar E. Iglesias
New
[v1,1/3] target/microblaze: Plug temp leaks for loads/stores
target/microblaze: Plug tcg temp leaks
- - 3 -
-
-
-
2019-11-06
Edgar E. Iglesias
New
[v1,1/1] hw/arm/boot: Rebuild hflags when modifying CPUState at boot
hw/arm/boot: Rebuild hflags when modifying CPUState at boot
- 1 3 -
-
-
-
2019-10-31
Edgar E. Iglesias
New
[PULL,v1,3/3] target/microblaze: Add props enabling exceptions on failed bus accesses
Xilinx queue
- - 2 -
-
-
-
2019-01-22
Edgar E. Iglesias
New
[PULL,v1,2/3] hw/microblaze: s3adsp1800: Create an unimplemented GPIO area
Xilinx queue
- - 1 -
-
-
-
2019-01-22
Edgar E. Iglesias
New
[PULL,v1,1/3] target/microblaze: Switch to transaction_failed hook
Xilinx queue
- - - -
-
-
-
2019-01-22
Edgar E. Iglesias
New
[v1,2/2] target/microblaze: Add props enabling exceptions on failed bus accesses
target/microblaze: Add properties to enable exceptions on failed bus accesses
- - 2 -
-
-
-
2019-01-04
Edgar E. Iglesias
New
[v1,1/1] hw/arm: versal: Plug memory leaks
hw/arm: versal: Fix memory leaks
- - 1 -
-
-
-
2019-01-04
Edgar E. Iglesias
New
[v1,4/4] hw/arm: versal: Correct the nr of IRQs to 192
hw/arm: versal: Correct number of IRQs in GIC setup
- - 1 -
-
-
-
2018-11-29
Edgar E. Iglesias
New
[v1,3/4] hw/arm: versal: Use IRQs 111 - 118 for virtio-mmio
hw/arm: versal: Correct number of IRQs in GIC setup
- - 1 -
-
-
-
2018-11-29
Edgar E. Iglesias
New
[v1,2/4] hw/arm: versal: Reduce number of virtio-mmio instances
hw/arm: versal: Correct number of IRQs in GIC setup
- - 1 -
-
-
-
2018-11-29
Edgar E. Iglesias
New
[v1,1/4] hw/arm: versal: Remove bogus virtio-mmio creation
hw/arm: versal: Correct number of IRQs in GIC setup
- - 2 -
-
-
-
2018-11-29
Edgar E. Iglesias
New
[v1,1/1] net: cadence_gem: Remove incorrect assert()
net: cadence_gem: Remove incorrect assert()
- - 1 -
-
-
-
2018-11-23
Edgar E. Iglesias
New
[v5,2/2] hw/arm: versal: Add a virtual Xilinx Versal board
arm: Add first models of Xilinx Versal SoC
- - - -
-
-
-
2018-11-02
Edgar E. Iglesias
New
[v5,1/2] hw/arm: versal: Add a model of Xilinx Versal SoC
arm: Add first models of Xilinx Versal SoC
- - - -
-
-
-
2018-11-02
Edgar E. Iglesias
New
[v4,4/4] hw/arm: versal: Add a virtual Xilinx Versal board
arm: Add first models of Xilinx Versal SoC
- - - -
-
-
-
2018-10-22
Edgar E. Iglesias
New
[v4,3/4] hw/arm: versal: Add a model of Xilinx Versal SoC
arm: Add first models of Xilinx Versal SoC
- - - -
-
-
-
2018-10-22
Edgar E. Iglesias
New
[v4,2/4] net: cadence_gem: Announce 64bit addressing support
arm: Add first models of Xilinx Versal SoC
- - 1 -
-
-
-
2018-10-22
Edgar E. Iglesias
New
[v4,1/4] net: cadence_gem: Announce availability of priority queues
arm: Add first models of Xilinx Versal SoC
- - - -
-
-
-
2018-10-22
Edgar E. Iglesias
New
[v3,4/4] hw/arm: versal: Add a virtual Xilinx Versal board
arm: Add first models of Xilinx Versal SoC
- - - -
-
-
-
2018-10-17
Edgar E. Iglesias
New
[v3,3/4] hw/arm: versal: Add a model of Xilinx Versal SoC
arm: Add first models of Xilinx Versal SoC
- - - -
-
-
-
2018-10-17
Edgar E. Iglesias
New
[v3,2/4] net: cadence_gem: Announce 64bit addressing support
arm: Add first models of Xilinx Versal SoC
- - 1 -
-
-
-
2018-10-17
Edgar E. Iglesias
New
[v3,1/4] net: cadence_gem: Announce availability of priority queues
arm: Add first models of Xilinx Versal SoC
- - - -
-
-
-
2018-10-17
Edgar E. Iglesias
New
[v2,12/12] hw/arm: versal: Add a virtual Xilinx Versal board
arm: Add first models of Xilinx Versal SoC
- - - -
-
-
-
2018-10-11
Edgar E. Iglesias
New
[v2,11/12] hw/arm: versal: Add a model of Xilinx Versal SoC
arm: Add first models of Xilinx Versal SoC
- - - -
-
-
-
2018-10-11
Edgar E. Iglesias
New
[v2,10/12] target/arm: Add the Cortex-A72
arm: Add first models of Xilinx Versal SoC
- - - -
-
-
-
2018-10-11
Edgar E. Iglesias
New
[v2,09/12] target-arm: powerctl: Enable HVC when starting CPUs to EL2
arm: Add first models of Xilinx Versal SoC
- - 1 -
-
-
-
2018-10-11
Edgar E. Iglesias
New
[v2,08/12] net: cadence_gem: Announce 64bit addressing support
arm: Add first models of Xilinx Versal SoC
- - 1 -
-
-
-
2018-10-11
Edgar E. Iglesias
New
[v2,07/12] net: cadence_gem: Implement support for 64bit descriptor addresses
arm: Add first models of Xilinx Versal SoC
- - 1 -
-
-
-
2018-10-11
Edgar E. Iglesias
New
[v2,06/12] net: cadence_gem: Add support for selecting the DMA MemoryRegion
arm: Add first models of Xilinx Versal SoC
- - 1 -
-
-
-
2018-10-11
Edgar E. Iglesias
New
[v2,05/12] net: cadence_gem: Add support for extended descriptors
arm: Add first models of Xilinx Versal SoC
- - 1 -
-
-
-
2018-10-11
Edgar E. Iglesias
New
[v2,04/12] net: cadence_gem: Add macro with max number of descriptor words
arm: Add first models of Xilinx Versal SoC
- - 2 -
-
-
-
2018-10-11
Edgar E. Iglesias
New
[v2,03/12] net: cadence_gem: Use uint32_t for 32bit descriptor words
Untitled series #70134
- - 2 -
-
-
-
2018-10-11
Edgar E. Iglesias
New
[v2,02/12] net: cadence_gem: Announce availability of priority queues
arm: Add first models of Xilinx Versal SoC
- - 1 -
-
-
-
2018-10-11
Edgar E. Iglesias
New
[v2,01/12] net: cadence_gem: Disable TSU feature bit
arm: Add first models of Xilinx Versal SoC
- - 1 -
-
-
-
2018-10-11
Edgar E. Iglesias
New
[v1,12/12] hw/arm: versal: Add a virtual Xilinx Versal board
arm: Add first models of Xilinx Versal SoC
- - - -
-
-
-
2018-10-03
Edgar E. Iglesias
New
[v1,11/12] hw/arm: versal: Add a model of Xilinx Versal SoC
arm: Add first models of Xilinx Versal SoC
- - - -
-
-
-
2018-10-03
Edgar E. Iglesias
New
[v1,10/12] target/arm: Add the Cortex-A72
arm: Add first models of Xilinx Versal SoC
- - 1 -
-
-
-
2018-10-03
Edgar E. Iglesias
New
[v1,09/12] target-arm: powerctl: Enable HVC when starting CPUs to EL2
arm: Add first models of Xilinx Versal SoC
- - 1 -
-
-
-
2018-10-03
Edgar E. Iglesias
New
[v1,08/12] net: cadence_gem: Announce 64bit addressing support
arm: Add first models of Xilinx Versal SoC
- - 1 -
-
-
-
2018-10-03
Edgar E. Iglesias
New
[v1,07/12] net: cadence_gem: Implement support for 64bit descriptor addresses
arm: Add first models of Xilinx Versal SoC
- - 1 -
-
-
-
2018-10-03
Edgar E. Iglesias
New
[v1,06/12] net: cadence_gem: Add support for selecting the DMA MemoryRegion
arm: Add first models of Xilinx Versal SoC
- - 2 -
-
-
-
2018-10-03
Edgar E. Iglesias
New
[v1,05/12] net: cadence_gem: Add support for extended descriptors
arm: Add first models of Xilinx Versal SoC
- - 1 -
-
-
-
2018-10-03
Edgar E. Iglesias
New
[v1,04/12] net: cadence_gem: Add macro with max number of descriptor words
arm: Add first models of Xilinx Versal SoC
- - 2 -
-
-
-
2018-10-03
Edgar E. Iglesias
New
[v1,03/12] net: cadence_gem: Use uint32_t for 32bit descriptor words
arm: Add first models of Xilinx Versal SoC
- - 2 -
-
-
-
2018-10-03
Edgar E. Iglesias
New
[v1,02/12] net: cadence_gem: Announce availability of priority queues
arm: Add first models of Xilinx Versal SoC
- - 1 -
-
-
-
2018-10-03
Edgar E. Iglesias
New
[v1,01/12] net: cadence_gem: Disable TSU feature bit
arm: Add first models of Xilinx Versal SoC
- - 1 -
-
-
-
2018-10-03
Edgar E. Iglesias
New
[PULL,v1,2/2] target-microblaze: Rework NOP/zero instruction handling
MicroBlaze Coverity fixes
- - 1 -
-
-
-
2018-06-15
Edgar E. Iglesias
New
[PULL,v1,1/2] target-microblaze: mmu: Correct masking of output addresses
MicroBlaze Coverity fixes
- 1 2 -
-
-
-
2018-06-15
Edgar E. Iglesias
New
[v1,2/2] target-microblaze: Rework NOP/zero instruction handling
target-microblaze: Coverity fixes
- - 1 -
-
-
-
2018-06-14
Edgar E. Iglesias
New
[v1,1/2] target-microblaze: mmu: Correct masking of output addresses
target-microblaze: Coverity fixes
- 1 2 -
-
-
-
2018-06-14
Edgar E. Iglesias
New
[v2,2/2] xlnx-zynqmp: Swap Cortex-R5 for Cortex-R5F
xlnx-zynqmp: Change the Cortex-R5 for Cortex-R5F
- - 3 1
-
-
-
2018-05-29
Edgar E. Iglesias
New
[v2,1/2] target-arm: Add the Cortex-R5F
xlnx-zynqmp: Change the Cortex-R5 for Cortex-R5F
- - 3 1
-
-
-
2018-05-29
Edgar E. Iglesias
New
[PULL,v1,38/38] target-microblaze: Consolidate MMU enabled checks
Xilinx queue
- - 2 -
-
-
-
2018-05-29
Edgar E. Iglesias
New
[PULL,v1,37/38] target-microblaze: cpu_mmu_index: Fixup indentation
Xilinx queue
- - 2 -
-
-
-
2018-05-29
Edgar E. Iglesias
New
[PULL,v1,36/38] target-microblaze: Use tcg_gen_movcond in eval_cond_jmp
Xilinx queue
- - 2 -
-
-
-
2018-05-29
Edgar E. Iglesias
New
[PULL,v1,35/38] target-microblaze: Convert env_btarget to i64
Xilinx queue
- - 2 -
-
-
-
2018-05-29
Edgar E. Iglesias
New
[PULL,v1,34/38] target-microblaze: Remove argument b in eval_cc()
Xilinx queue
- - 1 -
-
-
-
2018-05-29
Edgar E. Iglesias
New
[PULL,v1,33/38] target-microblaze: Use table based condition-codes conversion
Xilinx queue
- - 1 -
-
-
-
2018-05-29
Edgar E. Iglesias
New
[PULL,v1,32/38] target-microblaze: mmu: Cleanup debug log messages
Xilinx queue
- - 2 -
-
-
-
2018-05-29
Edgar E. Iglesias
New
[PULL,v1,31/38] target-microblaze: Simplify address computation using tcg_gen_addi_i32()
Xilinx queue
- - 2 -
-
-
-
2018-05-29
Edgar E. Iglesias
New
[PULL,v1,30/38] target-microblaze: Allow address sizes between 32 and 64 bits
Xilinx queue
- - 2 -
-
-
-
2018-05-29
Edgar E. Iglesias
New
[PULL,v1,29/38] target-microblaze: Add support for extended access to TLBLO
Xilinx queue
- - 1 -
-
-
-
2018-05-29
Edgar E. Iglesias
New
[PULL,v1,28/38] target-microblaze: dec_msr: Plug a temp leak
Xilinx queue
- - 1 -
-
-
-
2018-05-29
Edgar E. Iglesias
New
[PULL,v1,27/38] target-microblaze: mmu: Add a configurable output address mask
Xilinx queue
- - 2 -
-
-
-
2018-05-29
Edgar E. Iglesias
New
[PULL,v1,26/38] target-microblaze: mmu: Prepare for 64-bit addresses
Xilinx queue
- - 1 -
-
-
-
2018-05-29
Edgar E. Iglesias
New
[PULL,v1,25/38] target-microblaze: mmu: Remove unused register state
Xilinx queue
- - 2 -
-
-
-
2018-05-29
Edgar E. Iglesias
New
[PULL,v1,24/38] target-microblaze: mmu: Add R_TBLX_MISS macros
Xilinx queue
- - 2 -
-
-
-
2018-05-29
Edgar E. Iglesias
New
[PULL,v1,23/38] target-microblaze: Implement MFSE EAR
Xilinx queue
- - 1 -
-
-
-
2018-05-29
Edgar E. Iglesias
New
[PULL,v1,21/38] target-microblaze: Setup for 64bit addressing
Xilinx queue
- - 1 -
-
-
-
2018-05-29
Edgar E. Iglesias
New
[PULL,v1,20/38] target-microblaze: Make special registers 64-bit
Xilinx queue
- - 1 -
-
-
-
2018-05-29
Edgar E. Iglesias
New
[PULL,v1,19/38] target-microblaze: dec_msr: Fix MTS to FSR
Xilinx queue
- - 2 -
-
-
-
2018-05-29
Edgar E. Iglesias
New
[PULL,v1,18/38] target-microblaze: dec_msr: Reuse more code when reg-decoding
Xilinx queue
- - 2 -
-
-
-
2018-05-29
Edgar E. Iglesias
New
[PULL,v1,17/38] target-microblaze: dec_msr: Use bool and extract32
Xilinx queue
- - 2 -
-
-
-
2018-05-29
Edgar E. Iglesias
New
[PULL,v1,16/38] target-microblaze: Break out trap_illegal()
Xilinx queue
- - 2 -
-
-
-
2018-05-29
Edgar E. Iglesias
New
[PULL,v1,15/38] target-microblaze: Break out trap_userspace()
Xilinx queue
- - 2 -
-
-
-
2018-05-29
Edgar E. Iglesias
New
[PULL,v1,14/38] target-microblaze: Name special registers we support
Xilinx queue
- - 1 -
-
-
-
2018-05-29
Edgar E. Iglesias
New
[PULL,v1,13/38] target-microblaze: Use TCGv for load/store addresses
Xilinx queue
1 - 1 -
-
-
-
2018-05-29
Edgar E. Iglesias
New
[PULL,v1,12/38] target-microblaze: Remove pointer indirection for ld/st addresses
Xilinx queue
- - 2 -
-
-
-
2018-05-29
Edgar E. Iglesias
New
[PULL,v1,11/38] target-microblaze: Make compute_ldst_addr always use a temp
Xilinx queue
- - 2 -
-
-
-
2018-05-29
Edgar E. Iglesias
New
[PULL,v1,10/38] target-microblaze: Bypass MMU with MMU_NOMMU_IDX
Xilinx queue
- - 2 -
-
-
-
2018-05-29
Edgar E. Iglesias
New
[PULL,v1,09/38] target-microblaze: Conditionalize setting of PVR11_USE_MMU
Xilinx queue
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2018-05-29
Edgar E. Iglesias
New
[PULL,v1,08/38] target-microblaze: Remove USE_MMU PVR checks
Xilinx queue
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2018-05-29
Edgar E. Iglesias
New
[PULL,v1,07/38] target-microblaze: Tighten up TCGv_i32 vs TCGv type usage
Xilinx queue
- - 2 -
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2018-05-29
Edgar E. Iglesias
New
[PULL,v1,06/38] target-microblaze: Correct the PVR array size
Xilinx queue
- - 1 -
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2018-05-29
Edgar E. Iglesias
New
[PULL,v1,05/38] target-microblaze: Correct special register array sizes
Xilinx queue
- - 1 -
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2018-05-29
Edgar E. Iglesias
New
[PULL,v1,04/38] target-microblaze: Fallback to our latest CPU version
Xilinx queue
- - 1 -
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2018-05-29
Edgar E. Iglesias
New
[PULL,v1,03/38] target-microblaze: compute_ldst_addr: Use bool instead of int
Xilinx queue
- - 2 -
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2018-05-29
Edgar E. Iglesias
New
[PULL,v1,02/38] target-microblaze: dec_store: Use bool instead of unsigned int
Xilinx queue
- - 2 -
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2018-05-29
Edgar E. Iglesias
New
[PULL,v1,01/38] target-microblaze: dec_load: Use bool instead of unsigned int
Xilinx queue
- - 2 -
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2018-05-29
Edgar E. Iglesias
New
[v4,09/38] target-microblaze: Conditionalize setting of PVR11_USE_MMU
target-microblaze: Add support for Extended Addressing
- - 2 -
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2018-05-23
Edgar E. Iglesias
New
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