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: Submitter =
Frédéric Pétrot
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| 155 patches
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Patch
Series
A/F/R/T
S/W/F
Date
Submitter
Delegate
State
[v3,20/21] target/riscv: adding 128-bit access functions for some csrs
Adding partial support for 128-bit riscv target
- - - -
-
-
-
2021-10-19
Frédéric Pétrot
New
[v3,19/21] target/riscv: actual functions to realize crs 128-bit insns
Adding partial support for 128-bit riscv target
- - - -
-
-
-
2021-10-19
Frédéric Pétrot
New
[v3,18/21] target/riscv: modification of the trans_csrxx for 128-bit support
Adding partial support for 128-bit riscv target
- - 1 -
-
-
-
2021-10-19
Frédéric Pétrot
New
[v3,17/21] target/riscv: helper functions to wrap calls to 128-bit csr insns
Adding partial support for 128-bit riscv target
- - 1 -
-
-
-
2021-10-19
Frédéric Pétrot
New
[v3,16/21] target/riscv: adding high part of some csrs
Adding partial support for 128-bit riscv target
- - 1 -
-
-
-
2021-10-19
Frédéric Pétrot
New
[v3,15/21] target/riscv: support for 128-bit M extension
Adding partial support for 128-bit riscv target
- - - -
-
-
-
2021-10-19
Frédéric Pétrot
New
[v3,14/21] target/riscv: support for 128-bit arithmetic instructions
Adding partial support for 128-bit riscv target
- - - -
-
-
-
2021-10-19
Frédéric Pétrot
New
[v3,13/21] target/riscv: support for 128-bit shift instructions
Adding partial support for 128-bit riscv target
- - - -
-
-
-
2021-10-19
Frédéric Pétrot
New
[v3,12/21] target/riscv: support for 128-bit U-type instructions
Adding partial support for 128-bit riscv target
- - - -
-
-
-
2021-10-19
Frédéric Pétrot
New
[v3,11/21] target/riscv: support for 128-bit bitwise instructions
Adding partial support for 128-bit riscv target
- - - -
-
-
-
2021-10-19
Frédéric Pétrot
New
[v3,10/21] target/riscv: support for 128-bit loads and store
Adding partial support for 128-bit riscv target
- - - -
-
-
-
2021-10-19
Frédéric Pétrot
New
[v3,09/21] target/riscv: moving some insns close to similar insns
Adding partial support for 128-bit riscv target
- - 1 -
-
-
-
2021-10-19
Frédéric Pétrot
New
[v3,08/21] target/riscv: adding accessors to the registers upper part
Adding partial support for 128-bit riscv target
- - - -
-
-
-
2021-10-19
Frédéric Pétrot
New
[v3,07/21] target/riscv: setup everything so that riscv128-softmmu compiles
Adding partial support for 128-bit riscv target
- - - -
-
-
-
2021-10-19
Frédéric Pétrot
New
[v3,06/21] target/riscv: array for the 64 upper bits of 128-bit registers
Adding partial support for 128-bit riscv target
- - - -
-
-
-
2021-10-19
Frédéric Pétrot
New
[v3,05/21] target/riscv: separation of bitwise logic and aritmetic helpers
Adding partial support for 128-bit riscv target
- - 1 -
-
-
-
2021-10-19
Frédéric Pétrot
New
[v3,04/21] target/riscv: additional macros to check instruction support
Adding partial support for 128-bit riscv target
- - - -
-
-
-
2021-10-19
Frédéric Pétrot
New
[v3,03/21] Int128.h: addition of a few 128-bit operations
Adding partial support for 128-bit riscv target
- - - -
-
-
-
2021-10-19
Frédéric Pétrot
New
[v3,02/21] memory: add a few defines for octo (128-bit) values
Adding partial support for 128-bit riscv target
- - - -
-
-
-
2021-10-19
Frédéric Pétrot
New
[v3,01/21] memory: change define name for consistency
Adding partial support for 128-bit riscv target
- - 1 -
-
-
-
2021-10-19
Frédéric Pétrot
New
[v2,27/27] target/riscv: support for 128-bit satp
Adding partial support for 128-bit riscv target
- - - -
-
-
-
2021-10-06
Frédéric Pétrot
New
[v2,26/27] target/riscv: adding 128-bit access functions for some csrs
Adding partial support for 128-bit riscv target
- - - -
-
-
-
2021-10-06
Frédéric Pétrot
New
[v2,25/27] target/riscv: actual functions to realize crs 128-bit insns
Adding partial support for 128-bit riscv target
- - - -
-
-
-
2021-10-06
Frédéric Pétrot
New
[v2,24/27] target/riscv: modification of the trans_csrxx for 128-bit support
Adding partial support for 128-bit riscv target
- - - -
-
-
-
2021-10-06
Frédéric Pétrot
New
[v2,23/27] target/riscv: helper functions to wrap calls to 128-bit csr insns
Adding partial support for 128-bit riscv target
- - - -
-
-
-
2021-10-06
Frédéric Pétrot
New
[v2,22/27] target/riscv: adding high part of some csrs
Adding partial support for 128-bit riscv target
- - - -
-
-
-
2021-10-06
Frédéric Pétrot
New
[v2,21/27] target/riscv: div and rem insns on 128-bit
Adding partial support for 128-bit riscv target
- - - -
-
-
-
2021-10-06
Frédéric Pétrot
New
[v2,20/27] target/riscv: addition of the 'd' insns for 128-bit mult/div/rem
Adding partial support for 128-bit riscv target
- - - -
-
-
-
2021-10-06
Frédéric Pétrot
New
[v2,19/27] target/riscv: support for 128-bit base multiplications insns
Adding partial support for 128-bit riscv target
- - - -
-
-
-
2021-10-06
Frédéric Pétrot
New
[v2,18/27] target/riscv: 128-bit double word integer shift instructions
Adding partial support for 128-bit riscv target
- - - -
-
-
-
2021-10-06
Frédéric Pétrot
New
[v2,17/27] target/riscv: 128-bit double word integer arithmetic instructions
Adding partial support for 128-bit riscv target
- - - -
-
-
-
2021-10-06
Frédéric Pétrot
New
[v2,16/27] target/riscv: support for 128-bit loads and store
Adding partial support for 128-bit riscv target
- - - -
-
-
-
2021-10-06
Frédéric Pétrot
New
[v2,15/27] target/riscv: 128-bit support for instructions using gen_shift
Adding partial support for 128-bit riscv target
- - - -
-
-
-
2021-10-06
Frédéric Pétrot
New
[v2,14/27] target/riscv: 128-bit support for instructions using gen_arith/gen_logic
Adding partial support for 128-bit riscv target
- - - -
-
-
-
2021-10-06
Frédéric Pétrot
New
[v2,13/27] target/riscv: rename a few gen function helpers
Adding partial support for 128-bit riscv target
- - - -
-
-
-
2021-10-06
Frédéric Pétrot
New
[v2,12/27] target/riscv: moving some insns close to similar insns
Adding partial support for 128-bit riscv target
- - - -
-
-
-
2021-10-06
Frédéric Pétrot
New
[v2,11/27] target/riscv: handling 128-bit part in logic/arith/shift gen helpers
Adding partial support for 128-bit riscv target
- - - -
-
-
-
2021-10-06
Frédéric Pétrot
New
[v2,10/27] target/riscv: adding accessors to the registers upper part
Adding partial support for 128-bit riscv target
- - - -
-
-
-
2021-10-06
Frédéric Pétrot
New
[v2,09/27] target/riscv: setup everything so that riscv128-softmmu compiles
Adding partial support for 128-bit riscv target
- - - -
-
-
-
2021-10-06
Frédéric Pétrot
New
[v2,08/27] target/riscv: refactoring calls to gen_shift
Adding partial support for 128-bit riscv target
- - - -
-
-
-
2021-10-06
Frédéric Pétrot
New
[v2,07/27] target/riscv: refactoring calls to gen_arith
Adding partial support for 128-bit riscv target
- - - -
-
-
-
2021-10-06
Frédéric Pétrot
New
[v2,06/27] target/riscv: separation of bitwise logic and aritmetic helpers
Adding partial support for 128-bit riscv target
- - - -
-
-
-
2021-10-06
Frédéric Pétrot
New
[v2,05/27] target/riscv: additional macros to check instruction support
Adding partial support for 128-bit riscv target
- - - -
-
-
-
2021-10-06
Frédéric Pétrot
New
[v2,04/27] target/riscv: array for the 64 upper bits of 128-bit registers
Adding partial support for 128-bit riscv target
- - - -
-
-
-
2021-10-06
Frédéric Pétrot
New
[v2,03/27] target/riscv: adding upper 64 bits for misa
Adding partial support for 128-bit riscv target
- - - -
-
-
-
2021-10-06
Frédéric Pétrot
New
[v2,02/27] Int128.h: addition of a few 128-bit operations
Adding partial support for 128-bit riscv target
- - - -
-
-
-
2021-10-06
Frédéric Pétrot
New
[v2,01/27] memory: add a few defines for octo (128-bit) values
Adding partial support for 128-bit riscv target
- - - -
-
-
-
2021-10-06
Frédéric Pétrot
New
[8/8] target/riscv: Support for 128-bit satp
[1/8] target/riscv: Settings for 128-bit extension support
- - - -
-
-
-
2021-08-30
Frédéric Pétrot
New
[7/8] target/riscv: 128-bit support for some csrs
[1/8] target/riscv: Settings for 128-bit extension support
- - - -
-
-
-
2021-08-30
Frédéric Pétrot
New
[6/8] target/riscv: Support of compiler's 128-bit integer types
[1/8] target/riscv: Settings for 128-bit extension support
- - - -
-
-
-
2021-08-30
Frédéric Pétrot
New
[5/8] target/riscv: 128-bit multiply and divide
[1/8] target/riscv: Settings for 128-bit extension support
- - - -
-
-
-
2021-08-30
Frédéric Pétrot
New
[4/8] target/riscv: 128-bit arithmetic and logic instructions
[1/8] target/riscv: Settings for 128-bit extension support
- - - -
-
-
-
2021-08-30
Frédéric Pétrot
New
[3/8] target/riscv: Addition of 128-bit ldu, lq and sq instructions
[1/8] target/riscv: Settings for 128-bit extension support
- - - -
-
-
-
2021-08-30
Frédéric Pétrot
New
[2/8] target/riscv: 128-bit registers creation and access
[1/8] target/riscv: Settings for 128-bit extension support
- - - -
-
-
-
2021-08-30
Frédéric Pétrot
New
[1/8] target/riscv: Settings for 128-bit extension support
[1/8] target/riscv: Settings for 128-bit extension support
- - - -
-
-
-
2021-08-30
Frédéric Pétrot
New
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