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Patch
Series
A/F/R/T
S/W/F
Date
Submitter
Delegate
State
[v6,45/72] target/riscv: rvv-1.0: single-width saturating add and subtract instructions
support vector extension v1.0
- - 1 -
-
-
-
2021-01-12
Frank Chang
New
[v6,44/72] target/riscv: rvv-1.0: widening integer multiply-add instructions
support vector extension v1.0
- - 1 -
-
-
-
2021-01-12
Frank Chang
New
[v6,43/72] target/riscv: rvv-1.0: narrowing integer right shift instructions
support vector extension v1.0
- - 1 -
-
-
-
2021-01-12
Frank Chang
New
[v6,42/72] target/riscv: rvv-1.0: integer add-with-carry/subtract-with-borrow
support vector extension v1.0
- - - -
-
-
-
2021-01-12
Frank Chang
New
[v6,41/72] target/riscv: rvv-1.0: single-width bit shift instructions
support vector extension v1.0
- - 1 -
-
-
-
2021-01-12
Frank Chang
New
[v6,40/72] target/riscv: rvv-1.0: single-width averaging add and subtract instructions
support vector extension v1.0
- - 1 -
-
-
-
2021-01-12
Frank Chang
New
[v6,39/72] target/riscv: rvv-1.0: integer extension instructions
support vector extension v1.0
- - 1 -
-
-
-
2021-01-12
Frank Chang
New
[v6,38/72] target/riscv: rvv-1.0: whole register move instructions
support vector extension v1.0
- - - -
-
-
-
2021-01-12
Frank Chang
New
[v6,37/72] target/riscv: rvv-1.0: floating-point scalar move instructions
support vector extension v1.0
- - - -
-
-
-
2021-01-12
Frank Chang
New
[v6,36/72] target/riscv: rvv-1.0: floating-point move instruction
support vector extension v1.0
- - 1 -
-
-
-
2021-01-12
Frank Chang
New
[v6,35/72] target/riscv: rvv-1.0: integer scalar move instructions
support vector extension v1.0
- - 1 -
-
-
-
2021-01-12
Frank Chang
New
[v6,34/72] target/riscv: rvv-1.0: register gather instructions
support vector extension v1.0
- - 1 -
-
-
-
2021-01-12
Frank Chang
New
[v6,33/72] target/riscv: rvv-1.0: allow load element with sign-extended
support vector extension v1.0
- - 1 -
-
-
-
2021-01-12
Frank Chang
New
[v6,32/72] target/riscv: rvv-1.0: element index instruction
support vector extension v1.0
- - 1 -
-
-
-
2021-01-12
Frank Chang
New
[v6,31/72] target/riscv: rvv-1.0: iota instruction
support vector extension v1.0
- - 1 -
-
-
-
2021-01-12
Frank Chang
New
[v6,30/72] target/riscv: rvv-1.0: set-X-first mask bit instructions
support vector extension v1.0
- - 1 -
-
-
-
2021-01-12
Frank Chang
New
[v6,29/72] target/riscv: rvv-1.0: find-first-set mask bit instruction
support vector extension v1.0
- - 1 -
-
-
-
2021-01-12
Frank Chang
New
[v6,28/72] target/riscv: rvv-1.0: mask population count instruction
support vector extension v1.0
- - 1 -
-
-
-
2021-01-12
Frank Chang
New
[v6,27/72] target/riscv: rvv-1.0: floating-point classify instructions
support vector extension v1.0
- - 2 -
-
-
-
2021-01-12
Frank Chang
New
[v6,26/72] target/riscv: rvv-1.0: floating-point square-root instruction
support vector extension v1.0
- - 2 -
-
-
-
2021-01-12
Frank Chang
New
[v6,25/72] target/riscv: rvv-1.0: take fractional LMUL into vector max elements calculation
support vector extension v1.0
- - 2 -
-
-
-
2021-01-12
Frank Chang
New
[v6,24/72] target/riscv: rvv-1.0: update vext_max_elems() for load/store insns
support vector extension v1.0
- - 1 -
-
-
-
2021-01-12
Frank Chang
New
[v6,23/72] target/riscv: rvv-1.0: load/store whole register instructions
support vector extension v1.0
- - 1 -
-
-
-
2021-01-12
Frank Chang
New
[v6,22/72] target/riscv: rvv-1.0: amo operations
support vector extension v1.0
- - 1 -
-
-
-
2021-01-12
Frank Chang
New
[v6,21/72] target/riscv: rvv-1.0: fault-only-first unit stride load
support vector extension v1.0
- - 2 -
-
-
-
2021-01-12
Frank Chang
New
[v6,20/72] target/riscv: rvv-1.0: fix address index overflow bug of indexed load/store insns
support vector extension v1.0
- - 2 -
-
-
-
2021-01-12
Frank Chang
New
[v6,19/72] target/riscv: rvv-1.0: index load and store instructions
support vector extension v1.0
- - 1 -
-
-
-
2021-01-12
Frank Chang
New
[v6,18/72] target/riscv: rvv-1.0: stride load and store instructions
support vector extension v1.0
- - 1 -
-
-
-
2021-01-12
Frank Chang
New
[v6,17/72] target/riscv: rvv-1.0: configure instructions
support vector extension v1.0
- - 2 -
-
-
-
2021-01-12
Frank Chang
New
[v6,16/72] target/riscv: rvv:1.0: add translation-time nan-box helper function
support vector extension v1.0
- - 2 -
-
-
-
2021-01-12
Frank Chang
New
[v6,15/72] target/riscv: introduce more imm value modes in translator functions
support vector extension v1.0
- - 2 -
-
-
-
2021-01-12
Frank Chang
New
[v6,14/72] target/riscv: rvv-1.0: update check functions
support vector extension v1.0
- - 1 -
-
-
-
2021-01-12
Frank Chang
New
[v6,13/72] target/riscv: rvv-1.0: add VMA and VTA
support vector extension v1.0
- - 2 -
-
-
-
2021-01-12
Frank Chang
New
[v6,12/72] target/riscv: rvv-1.0: add fractional LMUL
support vector extension v1.0
- - 2 -
-
-
-
2021-01-12
Frank Chang
New
[v6,11/72] target/riscv: rvv-1.0: remove MLEN calculations
support vector extension v1.0
- - 2 -
-
-
-
2021-01-12
Frank Chang
New
[v6,10/72] target/riscv: rvv-1.0: check MSTATUS_VS when accessing vector csr registers
support vector extension v1.0
- - 2 -
-
-
-
2021-01-12
Frank Chang
New
[v6,09/72] target/riscv: rvv-1.0: add vlenb register
support vector extension v1.0
- - 2 -
-
-
-
2021-01-12
Frank Chang
New
[v6,08/72] target/riscv: rvv-1.0: add vcsr register
support vector extension v1.0
- - 2 -
-
-
-
2021-01-12
Frank Chang
New
[v6,07/72] target/riscv: rvv-1.0: remove rvv related codes from fcsr registers
support vector extension v1.0
- - 2 -
-
-
-
2021-01-12
Frank Chang
New
[v6,06/72] target/riscv: rvv-1.0: add translation-time vector context status
support vector extension v1.0
- - 2 -
-
-
-
2021-01-12
Frank Chang
New
[v6,05/72] target/riscv: rvv-1.0: introduce writable misa.v field
support vector extension v1.0
- - 2 -
-
-
-
2021-01-12
Frank Chang
New
[v6,04/72] target/riscv: rvv-1.0: add sstatus VS field
support vector extension v1.0
- - 2 -
-
-
-
2021-01-12
Frank Chang
New
[v6,03/72] target/riscv: rvv-1.0: add mstatus VS field
support vector extension v1.0
- - 2 -
-
-
-
2021-01-12
Frank Chang
New
[v6,02/72] target/riscv: Use FIELD_EX32() to extract wd field
support vector extension v1.0
- - 2 -
-
-
-
2021-01-12
Frank Chang
New
[v6,01/72] target/riscv: drop vector 0.7.1 and add 1.0 support
support vector extension v1.0
- - 2 -
-
-
-
2021-01-12
Frank Chang
New
[v2,1/1] hw/block/nvme: add smart_critical_warning property
add smart_critical_warning property for nvme
- - - -
-
-
-
2021-01-12
zhenwei pi
New
Dump NT_FILE note when generate coredump
Dump NT_FILE note when generate coredump
- - - -
-
-
-
2021-01-12
Kyle Zeng
New
[4/4] target/riscv: Remove built-in GDB XML files for CSRs
target/riscv: Generate the GDB XML file for CSR registers dynamically
- - 1 -
-
-
-
2021-01-12
Bin Meng
Superseded
[3/4] target/riscv: Generate the GDB XML file for CSR registers dynamically
target/riscv: Generate the GDB XML file for CSR registers dynamically
- - 1 -
-
-
-
2021-01-12
Bin Meng
Superseded
[2/4] target/riscv: Add CSR name in the CSR function table
target/riscv: Generate the GDB XML file for CSR registers dynamically
- - 1 -
-
-
-
2021-01-12
Bin Meng
New
[1/4] target/riscv: Make csr_ops[CSR_TABLE_SIZE] external
target/riscv: Generate the GDB XML file for CSR registers dynamically
- - 2 -
-
-
-
2021-01-12
Bin Meng
New
[v6,13/13] s390: Recognize confidential-guest-support option
Generalize memory encryption models
- - - -
-
-
-
2021-01-12
David Gibson
New
[v6,12/13] confidential guest support: Alter virtio default properties for protected guests
Generalize memory encryption models
- - 3 -
-
-
-
2021-01-12
David Gibson
New
[v6,11/13] spapr: PEF: prevent migration
Generalize memory encryption models
- - 2 -
-
-
-
2021-01-12
David Gibson
New
[v6,10/13] spapr: Add PEF based confidential guest support
Generalize memory encryption models
- - - -
-
-
-
2021-01-12
David Gibson
New
[v6,09/13] confidential guest support: Update documentation
Generalize memory encryption models
- - - -
-
-
-
2021-01-12
David Gibson
New
[v6,08/13] confidential guest support: Move SEV initialization into arch specific code
Generalize memory encryption models
- - - -
-
-
-
2021-01-12
David Gibson
New
[v6,07/13] confidential guest support: Introduce cgs "ready" flag
Generalize memory encryption models
- - - -
-
-
-
2021-01-12
David Gibson
New
[v6,06/13] sev: Add Error ** to sev_kvm_init()
Generalize memory encryption models
- - 3 -
-
-
-
2021-01-12
David Gibson
New
[v6,05/13] confidential guest support: Rework the "memory-encryption" property
Generalize memory encryption models
- - 1 -
-
-
-
2021-01-12
David Gibson
New
[v6,04/13] confidential guest support: Move side effect out of machine_set_memory_encryption()
Generalize memory encryption models
- - 2 -
-
-
-
2021-01-12
David Gibson
New
[v6,03/13] sev: Remove false abstraction of flash encryption
Generalize memory encryption models
- - - -
-
-
-
2021-01-12
David Gibson
New
[v6,02/13] confidential guest support: Introduce new confidential guest support class
Generalize memory encryption models
- - - -
-
-
-
2021-01-12
David Gibson
New
[v6,01/13] qom: Allow optional sugar props
Generalize memory encryption models
- - 3 -
-
-
-
2021-01-12
David Gibson
New
[2/2] hw/mips/loongson3_virt: Add TCG SMP support
hw/mips/loongson3_virt: Add TCG SMP support
- - - -
-
-
-
2021-01-12
Jiaxun Yang
New
[1/2] hw/intc: Add Loongson Inter Processor Interrupt controller
hw/mips/loongson3_virt: Add TCG SMP support
- - - -
-
-
-
2021-01-12
Jiaxun Yang
New
[RFC,v3,16/16] target/riscv: rvb: support and turn on B-extension from command line
support subsets of bitmanip extension
- - 2 -
-
-
-
2021-01-12
Frank Chang
New
[RFC,v3,15/16] target/riscv: rvb: add/shift with prefix zero-extend
support subsets of bitmanip extension
- - 1 -
-
-
-
2021-01-12
Frank Chang
New
[RFC,v3,14/16] target/riscv: rvb: address calculation
support subsets of bitmanip extension
- - 1 -
-
-
-
2021-01-12
Frank Chang
New
[RFC,v3,13/16] target/riscv: rvb: generalized or-combine
support subsets of bitmanip extension
- - 1 -
-
-
-
2021-01-12
Frank Chang
New
[RFC,v3,12/16] target/riscv: rvb: generalized reverse
support subsets of bitmanip extension
- - 1 -
-
-
-
2021-01-12
Frank Chang
New
[RFC,v3,11/16] target/riscv: rvb: rotate (left/right)
support subsets of bitmanip extension
- - 1 -
-
-
-
2021-01-12
Frank Chang
New
[RFC,v3,10/16] target/riscv: rvb: shift ones
support subsets of bitmanip extension
- - 1 -
-
-
-
2021-01-12
Frank Chang
New
[RFC,v3,09/16] target/riscv: rvb: single-bit instructions
support subsets of bitmanip extension
- - 1 -
-
-
-
2021-01-12
Frank Chang
New
[RFC,v3,08/16] target/riscv: add gen_shifti() and gen_shiftiw() helper functions
support subsets of bitmanip extension
- - - -
-
-
-
2021-01-12
Frank Chang
New
[RFC,v3,07/16] target/riscv: rvb: sign-extend instructions
support subsets of bitmanip extension
- - 1 -
-
-
-
2021-01-12
Frank Chang
New
[RFC,v3,06/16] target/riscv: rvb: min/max instructions
support subsets of bitmanip extension
- - 1 -
-
-
-
2021-01-12
Frank Chang
New
[RFC,v3,05/16] target/riscv: rvb: pack two words into one register
support subsets of bitmanip extension
- - 1 -
-
-
-
2021-01-12
Frank Chang
New
[RFC,v3,04/16] target/riscv: rvb: logic-with-negate
support subsets of bitmanip extension
- - 1 -
-
-
-
2021-01-12
Frank Chang
New
[RFC,v3,03/16] target/riscv: rvb: count bits set
support subsets of bitmanip extension
- - 1 -
-
-
-
2021-01-12
Frank Chang
New
[RFC,v3,02/16] target/riscv: rvb: count leading/trailing zeros
support subsets of bitmanip extension
- - 1 -
-
-
-
2021-01-12
Frank Chang
New
[RFC,v3,01/16] target/riscv: reformat @sh format encoding for B-extension
support subsets of bitmanip extension
- - 1 -
-
-
-
2021-01-12
Frank Chang
New
tests/acceptance: Test PMON with Loongson-3A1000 CPU
tests/acceptance: Test PMON with Loongson-3A1000 CPU
- - 1 1
-
-
-
2021-01-12
Jiaxun Yang
New
hw/intc/loongson_liointc: Fix per core ISR handling
hw/intc/loongson_liointc: Fix per core ISR handling
- - 1 -
-
-
-
2021-01-12
Jiaxun Yang
New
[v7,3/3] target/arm: Use object_property_add_bool for "sve" property
target/arm: Implement an IMPDEF pauth algorithm
- - 1 -
-
-
-
2021-01-11
Richard Henderson
New
[v7,2/3] target/arm: Add cpu properties to control pauth
target/arm: Implement an IMPDEF pauth algorithm
- - 1 1
-
-
-
2021-01-11
Richard Henderson
New
[v7,1/3] target/arm: Implement an IMPDEF pauth algorithm
target/arm: Implement an IMPDEF pauth algorithm
- - - 1
-
-
-
2021-01-11
Richard Henderson
New
[v6,3/3] target/arm: Use object_property_add_bool for "sve" property
target/arm: Implement an IMPDEF pauth algorithm
- - 1 -
-
-
-
2021-01-11
Richard Henderson
New
[v6,2/3] target/arm: Add cpu properties to control pauth
target/arm: Implement an IMPDEF pauth algorithm
- - 1 1
-
-
-
2021-01-11
Richard Henderson
New
[v6,1/3] target/arm: Implement an IMPDEF pauth algorithm
target/arm: Implement an IMPDEF pauth algorithm
- - - 1
-
-
-
2021-01-11
Richard Henderson
New
machine: add missing doc for memory-backend option
machine: add missing doc for memory-backend option
- - 1 -
-
-
-
2021-01-11
Igor Mammedov
New
hw/intc/ppc-uic: Make default dcr-base 0xc0, not 0x30
hw/intc/ppc-uic: Make default dcr-base 0xc0, not 0x30
- 1 - -
-
-
-
2021-01-11
Peter Maydell
New
Deprecate pmem=on with non-DAX capable backend file
Deprecate pmem=on with non-DAX capable backend file
- - 1 -
-
-
-
2021-01-11
Igor Mammedov
New
[v3,30/30] target/arm: Enforce alignment for sve LD1R
target/arm: enforce alignment
- - 1 -
-
-
-
2021-01-11
Richard Henderson
New
[v3,29/30] target/arm: Enforce alignment for aa64 vector LDn/STn (single)
target/arm: enforce alignment
- - 1 -
-
-
-
2021-01-11
Richard Henderson
New
[v3,28/30] target/arm: Enforce alignment for aa64 vector LDn/STn (multiple)
target/arm: enforce alignment
- - 1 -
-
-
-
2021-01-11
Richard Henderson
New
[v3,27/30] target/arm: Use MemOp for size + endian in aa64 vector ld/st
target/arm: enforce alignment
- - 1 -
-
-
-
2021-01-11
Richard Henderson
New
[v3,26/30] target/arm: Enforce alignment for aa64 load-acq/store-rel
target/arm: enforce alignment
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2021-01-11
Richard Henderson
New
[v3,25/30] target/arm: Use finalize_memop for aa64 fpr load/store
target/arm: enforce alignment
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2021-01-11
Richard Henderson
New
[v3,24/30] target/arm: Use finalize_memop for aa64 gpr load/store
target/arm: enforce alignment
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2021-01-11
Richard Henderson
New
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