Patchwork QEMU Development

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Patch A/R/T Date Submitter Delegate State
[05/13] target-arm: Implement privileged-execute-never (PXN) 0 0 0 2012-06-28 Peter Maydell New
[04/13] ARM: Make target_phys_addr_t 64 bits and physaddrs 40 bits 0 0 0 2012-06-28 Peter Maydell New
[03/13] bitops.h: Add functions to extract and deposit bitfields 0 1 0 2012-06-28 Peter Maydell New
[02/13] target-arm: Fix typo that meant TTBR1 accesses went to TTBR0 0 0 0 2012-06-28 Peter Maydell New
[01/13] hw/cadence_gem: Make rx_desc_addr and tx_desc_addr uint32_t 0 1 0 2012-06-28 Peter Maydell New
target-arm: Fix some copy-and-paste errors in cp register names 0 1 0 2012-06-28 Peter Maydell New
[v3] bitops.h: Add functions to extract and deposit bitfields 0 2 0 2012-06-28 Peter Maydell New
[v2] bitops.h: Add field32() and field64() functions to extract bitfields 0 1 0 2012-06-27 Peter Maydell New
target-arm: Fix typo that meant TTBR1 accesses went to TTBR0 0 0 0 2012-06-26 Peter Maydell New
bitops.h: Add field32() and field64() functions to extract bitfields 0 0 0 2012-06-25 Peter Maydell New
[v2,4/4] monitor: Use TARGET_PRI*PHYS to avoid TARGET_PHYS_ADDR_BITS ifdef 0 1 0 2012-06-25 Peter Maydell New
[v2,3/4] hw/sh_serial: Use TARGET_PRIxPHYS rather than %x for physaddr 0 1 0 2012-06-25 Peter Maydell New
[v2,2/4] hw/omap.h: Use TARGET_PRIxPHYS to define OMAP_FMT_plx 1 0 0 2012-06-25 Peter Maydell New
[v2,1/4] targphys.h: Define TARGET_PRI*PHYS format specifier macros 1 0 0 2012-06-25 Peter Maydell New
disas: Fix printing of addresses in disassembly 0 1 0 2012-06-25 Peter Maydell New
[4/4] monitor: Use PRI*PLX to avoid TARGET_PHYS_ADDR_BITS ifdef 0 0 0 2012-06-25 Peter Maydell New
[3/4] hw/sh_serial: Use PRIxPLX rather than %x for physaddr 0 0 0 2012-06-25 Peter Maydell New
[2/4] hw/omap.h: Use PRIxPLX to define OMAP_FMT_plx 0 0 0 2012-06-25 Peter Maydell New
[1/4] targphys.h: Define PRI*PLX format specifier macros 0 0 0 2012-06-25 Peter Maydell New
[2/2] cpu-common.h: Remove a pointless ifndef CONFIG_USER_ONLY 1 0 0 2012-06-22 Peter Maydell New
[1/2] cpu-common.h: Remove unnecessary guard on including targphys.h 0 1 0 2012-06-22 Peter Maydell New
Makefile.target: Update clean command to clean hw/ directory 0 0 0 2012-06-20 Peter Maydell New
Makefile.target: Update clean command to clean hw/ directory 0 0 0 2012-06-20 Peter Maydell New
[33/33] target-arm: Remove ARM_CPUID_* macros 0 1 0 2012-06-20 Peter Maydell New
[32/33] target-arm: Remove remaining old cp15 infrastructure 0 0 0 2012-06-20 Peter Maydell New
[31/33] target-arm: Move block cache ops to new cp15 framework 0 0 0 2012-06-20 Peter Maydell New
[30/33] target-arm: Remove c0_cachetype CPUARMState field 0 0 0 2012-06-20 Peter Maydell New
[29/33] target-arm: Convert final ID registers 0 0 0 2012-06-20 Peter Maydell New
[28/33] target-arm: Convert MPIDR 0 0 0 2012-06-20 Peter Maydell New
[27/33] target-arm: Convert cp15 cache ID registers 0 0 0 2012-06-20 Peter Maydell New
[26/33] target-arm: Convert cp15 crn=0 crm={1, 2} feature registers 0 0 0 2012-06-20 Peter Maydell New
[25/33] target-arm: Convert cp15 crn=1 registers 0 0 0 2012-06-20 Peter Maydell New
[24/33] target-arm: Convert cp15 crn=9 registers 0 0 0 2012-06-20 Peter Maydell New
[23/33] target-arm: Convert cp15 crn=6 registers 0 0 0 2012-06-20 Peter Maydell New
[22/33] target-arm: convert cp15 crn=7 registers 0 0 0 2012-06-20 Peter Maydell New
[21/33] target-arm: Convert cp15 VA-PA translation registers 0 0 0 2012-06-20 Peter Maydell New
[20/33] target-arm: Convert cp15 MMU TLB control 0 0 0 2012-06-20 Peter Maydell New
[19/33] target-arm: Convert cp15 crn=15 registers 0 0 0 2012-06-20 Peter Maydell New
[18/33] target-arm: Convert cp15 crn=10 registers 0 0 0 2012-06-20 Peter Maydell New
[17/33] target-arm: Convert cp15 crn=13 registers 0 0 0 2012-06-20 Peter Maydell New
[16/33] target-arm: Convert cp15 crn=2 registers 0 0 0 2012-06-20 Peter Maydell New
[15/33] target-arm: Convert MMU fault status cp15 registers 0 0 0 2012-06-20 Peter Maydell New
[14/33] target-arm: Convert cp15 c3 register 0 0 0 2012-06-20 Peter Maydell New
[13/33] target-arm: Convert generic timer cp15 regs 0 0 0 2012-06-20 Peter Maydell New
[12/33] target-arm: Convert performance monitor registers 0 0 0 2012-06-20 Peter Maydell New
[11/33] target-arm: Convert TLS registers 0 0 0 2012-06-20 Peter Maydell New
[10/33] target-arm: Convert WFI/barriers special cases to cp_reginfo 0 0 0 2012-06-20 Peter Maydell New
[09/33] target-arm: Convert TEECR, TEEHBR to new scheme 0 0 0 2012-06-20 Peter Maydell New
[08/33] target-arm: Convert debug registers to cp_reginfo 0 0 0 2012-06-20 Peter Maydell New
[07/33] target-arm: Add register_cp_regs_for_features() 0 0 0 2012-06-20 Peter Maydell New
[06/33] target-arm: Remove old cpu_arm_set_cp_io infrastructure 0 0 0 2012-06-20 Peter Maydell New
[05/33] hw/pxa2xx_pic: Convert coprocessor registers to new scheme 0 0 0 2012-06-20 Peter Maydell New
[04/33] hw/pxa2xx.c: Convert CLKCFG and PWRMODE cp14 regs 0 0 0 2012-06-20 Peter Maydell New
[03/33] hw/pxa2xx: Convert cp14 perf registers to new scheme 0 0 0 2012-06-20 Peter Maydell New
[02/33] target-arm: initial coprocessor register framework 0 0 0 2012-06-20 Peter Maydell New
[01/33] target-arm: Fix 11MPCore cache type register value 0 0 0 2012-06-20 Peter Maydell New
[PULL,00/33] target-arm queue 0 0 0 2012-06-20 Peter Maydell New
Makefile.hw: avoid overly large 'make clean' rm command 0 0 0 2012-06-19 Peter Maydell New
[16/16] arm_boot: Conditionalised DTB command line update 0 0 0 2012-06-19 Peter Maydell New
[15/16] cadence_ttc: changed master clock frequency 0 0 0 2012-06-19 Peter Maydell New
[14/16] cadence_gem: avoid stack-writing buffer-overrun 0 1 0 2012-06-19 Peter Maydell New
[13/16] hw/a9mpcore: Fix compilation failure if physaddrs are 64 bit 0 1 0 2012-06-19 Peter Maydell New
[12/16] hw/omap.h: Drop broken MEM_VERBOSE tracing 0 0 0 2012-06-19 Peter Maydell New
[11/16] hw/armv7m_nvic: Make the NVIC a freestanding class 0 0 0 2012-06-19 Peter Maydell New
[10/16] hw/arm_gic: Move CPU interface memory region setup into arm_gic_init 0 0 0 2012-06-19 Peter Maydell New
[09/16] hw/arm_gic.c: Make NVIC interrupt numbering a runtime setting 0 0 0 2012-06-19 Peter Maydell New
[08/16] hw/arm_gic: Make CPU target registers RAZ/WI on uniprocessor 0 0 0 2012-06-19 Peter Maydell New
[07/16] hw/arm_gic: Add qdev property for GIC revision 0 0 0 2012-06-19 Peter Maydell New
[06/16] hw/armv7m_nvic: Use MemoryRegions for NVIC specific registers 0 0 0 2012-06-19 Peter Maydell New
[05/16] hw/arm_gic: Move NVIC specific reset to armv7m_nvic_reset 0 0 0 2012-06-19 Peter Maydell New
[04/16] hw/arm_gic: Remove the special casing of NCPU for the NVIC 0 0 0 2012-06-19 Peter Maydell New
[03/16] hw/arm_gic: Remove NVIC ifdefs from gic_state struct 0 1 0 2012-06-19 Peter Maydell New
[02/16] arm_boot: Fix typos in comment 0 1 0 2012-06-19 Peter Maydell New
[01/16] ARM: Exynos4210 IRQ: Introduce new IRQ gate functionality. 0 0 0 2012-06-19 Peter Maydell New
[PULL,00/16] arm-devs queue 0 0 0 2012-06-19 Peter Maydell New
qemu_find_file: check name as a straight path even if it has no '/' 0 0 0 2012-05-25 Peter Maydell New
[v2] hw/a9mpcore: Fix compilation failure if physaddrs are 64 bit 0 1 0 2012-05-22 Peter Maydell New
hw/a9mpcore: Fix compilation failure if physaddrs are 64 bit 0 0 0 2012-05-22 Peter Maydell New
hw/cadence_gem: Make rx_desc_addr and tx_desc_addr uint32_t 0 1 0 2012-05-22 Peter Maydell New
hw/omap.h: Drop broken MEM_VERBOSE tracing 0 0 0 2012-05-15 Peter Maydell New
[qom-next,v2,33/33] target-arm: Remove ARM_CPUID_* macros 0 1 0 2012-05-14 Peter Maydell New
[qom-next,v2,32/33] target-arm: Remove remaining old cp15 infrastructure 0 0 0 2012-05-14 Peter Maydell New
[qom-next,v2,31/33] target-arm: Move block cache ops to new cp15 framework 0 0 0 2012-05-14 Peter Maydell New
[qom-next,v2,30/33] target-arm: Remove c0_cachetype CPUARMState field 0 0 0 2012-05-14 Peter Maydell New
[qom-next,v2,29/33] target-arm: Convert final ID registers 0 0 0 2012-05-14 Peter Maydell New
[qom-next,v2,28/33] target-arm: Convert MPIDR 0 0 0 2012-05-14 Peter Maydell New
[qom-next,v2,27/33] target-arm: Convert cp15 cache ID registers 0 0 0 2012-05-14 Peter Maydell New
[qom-next,v2,26/33] target-arm: Convert cp15 crn=0 crm={1, 2} feature registers 0 0 0 2012-05-14 Peter Maydell New
[qom-next,v2,25/33] target-arm: Convert cp15 crn=1 registers 0 0 0 2012-05-14 Peter Maydell New
[qom-next,v2,24/33] target-arm: Convert cp15 crn=9 registers 0 0 0 2012-05-14 Peter Maydell New
[qom-next,v2,23/33] target-arm: Convert cp15 crn=6 registers 0 0 0 2012-05-14 Peter Maydell New
[qom-next,v2,22/33] target-arm: convert cp15 crn=7 registers 0 0 0 2012-05-14 Peter Maydell New
[qom-next,v2,21/33] target-arm: Convert cp15 VA-PA translation registers 0 0 0 2012-05-14 Peter Maydell New
[qom-next,v2,20/33] target-arm: Convert cp15 MMU TLB control 0 0 0 2012-05-14 Peter Maydell New
[qom-next,v2,19/33] target-arm: Convert cp15 crn=15 registers 0 0 0 2012-05-14 Peter Maydell New
[qom-next,v2,18/33] target-arm: Convert cp15 crn=10 registers 0 0 0 2012-05-14 Peter Maydell New
[qom-next,v2,17/33] target-arm: Convert cp15 crn=13 registers 0 0 0 2012-05-14 Peter Maydell New
[qom-next,v2,16/33] target-arm: Convert cp15 crn=2 registers 0 0 0 2012-05-14 Peter Maydell New
[qom-next,v2,15/33] target-arm: Convert MMU fault status cp15 registers 0 0 0 2012-05-14 Peter Maydell New
[qom-next,v2,14/33] target-arm: Convert cp15 c3 register 0 0 0 2012-05-14 Peter Maydell New