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Patch
Series
A/F/R/T
S/W/F
Date
Submitter
Delegate
State
[09/11] include/exec: added functions to the stubs in exec-all.h
target/ppc: add support to disable-tcg
- - - -
-
-
-
2021-05-12
Bruno Larsen (billionai)
New
[RFC,08/11] target/ppc: wrapped some TCG only logic with ifdefs
target/ppc: add support to disable-tcg
- - - -
-
-
-
2021-05-12
Bruno Larsen (billionai)
New
[07/11] target/ppc: added KVM fallback to fpscr manipulation
target/ppc: add support to disable-tcg
- - - -
-
-
-
2021-05-12
Bruno Larsen (billionai)
New
[06/11] target/ppc: updated vscr manipulation in machine.c
target/ppc: add support to disable-tcg
- - - -
-
-
-
2021-05-12
Bruno Larsen (billionai)
New
[05/11] target/ppc: moved ppc_store_lpcr to cpu.c
target/ppc: add support to disable-tcg
- - 2 -
-
-
-
2021-05-12
Bruno Larsen (billionai)
New
[04/11] target/ppc: moved ppc_store_msr into gdbstub.c
target/ppc: add support to disable-tcg
- - - -
-
-
-
2021-05-12
Bruno Larsen (billionai)
New
[03/11] target/ppc: moved ppc_cpu_dump_state to cpu_init.c
target/ppc: add support to disable-tcg
- - 1 -
-
-
-
2021-05-12
Bruno Larsen (billionai)
New
[02/11] target/ppc: moved ppc_store_sdr1 to cpu.c
target/ppc: add support to disable-tcg
- - 1 -
-
-
-
2021-05-12
Bruno Larsen (billionai)
New
[01/11] target/ppc: created ppc_{store, get}_vscr for generic vscr usage
target/ppc: add support to disable-tcg
- - 1 -
-
-
-
2021-05-12
Bruno Larsen (billionai)
New
[RESEND,v5,4/4] target/ppc: isolated cpu init from translation logic
Untitled series #242675
- - 1 -
-
-
-
2021-05-07
Bruno Larsen (billionai)
New
[RESEND,v5,3/4] target/ppc: turned SPR R/W callbacks not static
Untitled series #242675
- - - -
-
-
-
2021-05-07
Bruno Larsen (billionai)
New
[RESEND,v5,2/4] target/ppc: move SPR R/W callbacks to translate.c
Untitled series #242522
- - 1 -
-
-
-
2021-05-06
Bruno Larsen (billionai)
New
[v5,4/4] target/ppc: isolated cpu init from translation logic
target/ppc: Untangle CPU init from translation
- - 1 -
-
-
-
2021-05-05
Bruno Larsen (billionai)
New
[v5,3/4] target/ppc: turned SPR R/W callbacks not static
target/ppc: Untangle CPU init from translation
- - - -
-
-
-
2021-05-05
Bruno Larsen (billionai)
New
[v5,2/4] target/ppc: move SPR R/W callbacks to translate.c
target/ppc: Untangle CPU init from translation
- - - -
-
-
-
2021-05-05
Bruno Larsen (billionai)
New
[v5,1/4] target/ppc: renamed SPR registration functions
target/ppc: Untangle CPU init from translation
- - 1 -
-
-
-
2021-05-05
Bruno Larsen (billionai)
New
[v4,5/5] target/ppc: isolated cpu init from translation logic
target/ppc: Untangle CPU init from translation
- - 1 -
-
-
-
2021-05-04
Bruno Larsen (billionai)
New
[v4,4/5] target/ppc: turned SPR R/W callbacks not static
target/ppc: Untangle CPU init from translation
- - 1 -
-
-
-
2021-05-04
Bruno Larsen (billionai)
New
[v4,3/5] target/ppc: move SPR R/W callbacks to translate.c
target/ppc: Untangle CPU init from translation
- - 1 -
-
-
-
2021-05-04
Bruno Larsen (billionai)
New
[v4,2/5] target/ppc: renamed SPR registration functions
target/ppc: Untangle CPU init from translation
- - 1 -
-
-
-
2021-05-04
Bruno Larsen (billionai)
New
[v4,1/5] target/ppc: Fold gen_*_xer into their callers
target/ppc: Untangle CPU init from translation
- - 1 -
-
-
-
2021-05-04
Bruno Larsen (billionai)
New
[v3,7/7] target/ppc: isolated cpu init from translation logic
target/ppc: untangle CPU init from translation
- - 1 -
-
-
-
2021-04-30
Bruno Larsen (billionai)
New
[v3,6/7] target/ppc: renamed SPR registration functions
target/ppc: untangle CPU init from translation
- - 1 -
-
-
-
2021-04-30
Bruno Larsen (billionai)
New
[v3,5/7] target/ppc: removed VSCR from SPR registration
target/ppc: untangle CPU init from translation
- - 1 -
-
-
-
2021-04-30
Bruno Larsen (billionai)
New
[v3,4/7] target/ppc: turned SPR R/W callbacks not static
target/ppc: untangle CPU init from translation
- - 1 -
-
-
-
2021-04-30
Bruno Larsen (billionai)
New
[v3,3/7] target/ppc: remove unnecessary SPR functions
target/ppc: untangle CPU init from translation
- - 1 -
-
-
-
2021-04-30
Bruno Larsen (billionai)
New
[v3,2/7] target/ppc: Isolated SPR read/write callbacks
target/ppc: untangle CPU init from translation
- - - -
-
-
-
2021-04-30
Bruno Larsen (billionai)
New
[v3,1/7] target/ppc: Created !TCG SPR registration macro
target/ppc: untangle CPU init from translation
- - - -
-
-
-
2021-04-30
Bruno Larsen (billionai)
New
[v2,7/7] target/ppc: isolated cpu init from translation logic
target/ppc: untangle cpu init from translation
- - - -
-
-
-
2021-04-29
Bruno Larsen (billionai)
New
[v2,6/7] target/ttc: renamed SPR registration functions
target/ppc: untangle cpu init from translation
- - 1 -
-
-
-
2021-04-29
Bruno Larsen (billionai)
New
[v2,5/7] target/ppc: removed VSCR from SPR registration
target/ppc: untangle cpu init from translation
- - - -
-
-
-
2021-04-29
Bruno Larsen (billionai)
New
[v2,4/7] target/ppc: turned SPR R/W callbacks not static
target/ppc: untangle cpu init from translation
- - - -
-
-
-
2021-04-29
Bruno Larsen (billionai)
New
[v2,3/7] target/ppc: Isolated SPR read/write callbacks
target/ppc: untangle cpu init from translation
- - - -
-
-
-
2021-04-29
Bruno Larsen (billionai)
New
[v2,2/7] target/ppc: Created !TCG SPR registration macro
target/ppc: untangle cpu init from translation
- - - -
-
-
-
2021-04-29
Bruno Larsen (billionai)
New
[v2,1/7] target/ppc: move opcode table logic to translate.c
target/ppc: untangle cpu init from translation
- - 1 -
-
-
-
2021-04-29
Bruno Larsen (billionai)
New
[v4] target/ppc: code motion from translate_init.c.inc to gdbstub.c
[v4] target/ppc: code motion from translate_init.c.inc to gdbstub.c
- - - -
-
-
-
2021-04-26
Bruno Larsen (billionai)
New
[RFC,4/4] target/ppc: isolated cpu init from translation logic
target/ppc: code motion to compile translate_init
- - - -
-
-
-
2021-04-23
Bruno Larsen (billionai)
New
[RFC,3/4] target/ppc: Move SPR generation to separate file
target/ppc: code motion to compile translate_init
- - - -
-
-
-
2021-04-23
Bruno Larsen (billionai)
New
[RFC,2/4] target/ppc: isolated SPR read/write callbacks
target/ppc: code motion to compile translate_init
- - - -
-
-
-
2021-04-23
Bruno Larsen (billionai)
New
[RFC,1/4] target/ppc: move opcode table logic to translate.c
target/ppc: code motion to compile translate_init
- - - -
-
-
-
2021-04-23
Bruno Larsen (billionai)
New
[v3] target/ppc: code motion from translate_init.c.inc to gdbstub.c
[v3] target/ppc: code motion from translate_init.c.inc to gdbstub.c
- - 1 -
-
-
-
2021-04-14
Bruno Larsen (billionai)
New
[v2] target/ppc: code motion from translate_init.c.inc to gdbstub.c
[v2] target/ppc: code motion from translate_init.c.inc to gdbstub.c
- - - -
-
-
-
2021-04-13
Bruno Larsen (billionai)
New
target/ppc: code motion from translate_init.c.inc to gdbstub.c
target/ppc: code motion from translate_init.c.inc to gdbstub.c
- - - -
-
-
-
2021-04-12
Bruno Larsen (billionai)
New
[4/4] target/ppc: updated build rules for disable-tcg option
target/ppc: add disable-tcg option
- - - -
-
-
-
2021-04-09
Bruno Larsen (billionai)
New
[3/4] target/ppc: Add stubs for tcg functions, so it builds
target/ppc: add disable-tcg option
- - - -
-
-
-
2021-04-09
Bruno Larsen (billionai)
New
[2/4] target/ppc: added solutions for building with disable-tcg
target/ppc: add disable-tcg option
- - - -
-
-
-
2021-04-09
Bruno Larsen (billionai)
New
[1/4] target/ppc: Code motion required to build disabling tcg
target/ppc: add disable-tcg option
- - - -
-
-
-
2021-04-09
Bruno Larsen (billionai)
New
qmp: extend QMP to provide read/write access to physical memory
- - - -
-
-
-
2014-11-26
Bryan D. Payne
New
[1/1] qmp: extend QMP to provide read/write access to physical memory
- - - -
-
-
-
2014-11-26
Bryan D. Payne
New
[2/2] tests/migration: Set compression level in migration tests
*** Properly apply migration compression level
- - - -
-
-
-
2024-03-01
Bryan Zhang
New
[1/2] migration: Properly apply migration compression level parameters
*** Properly apply migration compression level
- - - -
-
-
-
2024-03-01
Bryan Zhang
New
[5/5] migration: Add integration test for 'qatzip' compression method
*** Implement using Intel QAT to offload ZLIB
- - - -
-
-
-
2023-12-31
Bryan Zhang
New
[4/5] migration: Implement 'qatzip' methods using QAT
*** Implement using Intel QAT to offload ZLIB
- - - -
-
-
-
2023-12-31
Bryan Zhang
New
[3/5] migration: Introduce unimplemented 'qatzip' compression method
*** Implement using Intel QAT to offload ZLIB
- - - -
-
-
-
2023-12-31
Bryan Zhang
New
[2/5] migration: Add compression level parameter for QATzip
*** Implement using Intel QAT to offload ZLIB
- - - -
-
-
-
2023-12-31
Bryan Zhang
New
[1/5] meson: Introduce 'qatzip' feature to the build system.
*** Implement using Intel QAT to offload ZLIB
- - - -
-
-
-
2023-12-31
Bryan Zhang
New
[8/8] added mmu tc, sfc, dfc, and access control registers to the cpu header
- - - -
-
-
-
2011-08-17
Bryce Lanham
New
[7/8] added move16, cinva, pflush instructions, and disabled abort on execution of frestore/fsave
- - - -
-
-
-
2011-08-17
Bryce Lanham
New
[6/8] adds SFC, DFC, MMU TC, access control register, and user stack pointer acces to movec_to/from
- - - -
-
-
-
2011-08-17
Bryce Lanham
New
[5/8] partially working network driver, needs more comparison with real hardware before it can be m…
- - - -
-
-
-
2011-08-17
Bryce Lanham
New
[4/8] next keyboard driver, only supports a subset of modifier keys
- - - -
-
-
-
2011-08-17
Bryce Lanham
New
[3/8] next framebuffer driver, very basic, only supports running under 32 bit color at the moment
- - - -
-
-
-
2011-08-17
Bryce Lanham
New
[2/8] main next driver, needs a bit of cleanup
- - - -
-
-
-
2011-08-17
Bryce Lanham
New
[1/8] added next source files to Makefile.target
- - - -
-
-
-
2011-08-17
Bryce Lanham
New
[111/111] m68k: move from sr can use effective addresse on m68k
- - - -
-
-
-
2011-08-17
Bryce Lanham
New
[110/111] m68k: add movec instruction
- - - -
-
-
-
2011-08-17
Bryce Lanham
New
[109/111] m68k: first draft of q800 emulation (not working)
- - - -
-
-
-
2011-08-17
Bryce Lanham
New
[108/111] m68k: add fatanh instruction
- - - -
-
-
-
2011-08-17
Bryce Lanham
New
[107/111] m68k: add flognp1 instruction
- - - -
-
-
-
2011-08-17
Bryce Lanham
New
[106/111] m68k: add ftanh instruction
- - - -
-
-
-
2011-08-17
Bryce Lanham
New
[105/111] m68k: add fsinh instruction
- - - -
-
-
-
2011-08-17
Bryce Lanham
New
[104/111] m68k: add fsincos instruction
- - - -
-
-
-
2011-08-17
Bryce Lanham
New
[103/111] m68k: add fasin instruction
- - - -
-
-
-
2011-08-17
Bryce Lanham
New
[102/111] m68k: add fcosh instruction
- - - -
-
-
-
2011-08-17
Bryce Lanham
New
[101/111] m68k: correctly load signed word into floating point register
- - - -
-
-
-
2011-08-17
Bryce Lanham
New
[100/111] m68k: use log10l() to compute log10_FP0()
- - - -
-
-
-
2011-08-17
Bryce Lanham
New
[099/111] m68k: use logl() to compute ln_FP0()
- - - -
-
-
-
2011-08-17
Bryce Lanham
New
[098/111] m68k: use exp2l() to compute exp2_FP0()
- - - -
-
-
-
2011-08-17
Bryce Lanham
New
[097/111] m68k: use expl() to compute exp_FP0()
- - - -
-
-
-
2011-08-17
Bryce Lanham
New
[096/111] m68k: correctly convert floatx80<->long double
- - - -
-
-
-
2011-08-17
Bryce Lanham
New
[095/111] m68k: add bkpt instruction
- - - -
-
-
-
2011-08-17
Bryce Lanham
New
[094/111] m68k: define floatx80_default_inf_high and floatx80_default_inf_low
- - - -
-
-
-
2011-08-17
Bryce Lanham
New
[093/111] m68k: add exg instruction
- - - -
-
-
-
2011-08-17
Bryce Lanham
New
[092/111] m68k: gdb FP registers are 96 bits
- - - -
-
-
-
2011-08-17
Bryce Lanham
New
[091/111] m68k: don't call gdb_register_coprocessor() twice.
- - - -
-
-
-
2011-08-17
Bryce Lanham
New
[090/111] m68k: correctly define and manage NaN
- - - -
-
-
-
2011-08-17
Bryce Lanham
New
[089/111] m68k: add ftentox instruction
- - - -
-
-
-
2011-08-17
Bryce Lanham
New
[088/111] m68k: allows bfins to manage correctly width = 32
- - - -
-
-
-
2011-08-17
Bryce Lanham
New
[087/111] m68k: fcmp correctly compares infinity.
- - - -
-
-
-
2011-08-17
Bryce Lanham
New
[086/111] m68k: correct bfins instruction
- - - -
-
-
-
2011-08-17
Bryce Lanham
New
[085/111] m68k: add fatan instruction
- - - -
-
-
-
2011-08-17
Bryce Lanham
New
[084/111] m68k: correct fmovemx FP registers order.
- - - -
-
-
-
2011-08-17
Bryce Lanham
New
[083/111] m68k: flush flags before negx instruction.
- - - -
-
-
-
2011-08-17
Bryce Lanham
New
[082/111] m68k: add fmod instruction
- - - -
-
-
-
2011-08-17
Bryce Lanham
New
[081/111] m68k: correct fpcr update
- - - -
-
-
-
2011-08-17
Bryce Lanham
New
[080/111] m68k: add fcos instruction
- - - -
-
-
-
2011-08-17
Bryce Lanham
New
[079/111] m68k: add fsin instruction
- - - -
-
-
-
2011-08-17
Bryce Lanham
New
[078/111] m68k: add ftan instruction
- - - -
-
-
-
2011-08-17
Bryce Lanham
New
[077/111] m68k: add facos instruction
- - - -
-
-
-
2011-08-17
Bryce Lanham
New
[076/111] m68k: register source operand is always in extended size
- - - -
-
-
-
2011-08-17
Bryce Lanham
New
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