Show patches with: State = Action Required       |    Archived = No       |   426459 patches
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Patch Series A/F/R/T S/W/F Date Submitter Delegate State
[1/5] target-tricore: Fix LOOP using wrong register for compare - - - - --- 2015-05-05 Bastian Koppelmann New
[PULL] target-tricore: fix CACHEA/I_POSTINC/PREINC using data register.. - - - - --- 2015-03-30 Bastian Koppelmann New
[PULL] tricore patches for 2.3-rc2 - - - - --- 2015-03-30 Bastian Koppelmann New
target-tricore: fix CACHEA/I_POSTINC/PREINC using data register.. - - - - --- 2015-03-27 Bastian Koppelmann New
[PULL,4/4] target-tricore: properly fix dvinit_b/h_13 - - - - --- 2015-03-24 Bastian Koppelmann New
[PULL,3/4] target-tricore: fix RRPW_DEXTR using wrong reg - - - - --- 2015-03-24 Bastian Koppelmann New
[PULL,2/4] target-tricore: fix DVINIT_HU/BU calculating overflow before result - - - - --- 2015-03-24 Bastian Koppelmann New
[PULL,1/4] target-tricore: Fix two helper functions (clang warnings) - - - - --- 2015-03-24 Bastian Koppelmann New
[PULL,0/4] tricore-patches for 2.3-rc1 - - - - --- 2015-03-24 Bastian Koppelmann New
target-tricore: properly fix dvinit_b/h_13 - - - - --- 2015-03-23 Bastian Koppelmann New
target-tricore: fix RRPW_DEXTR using wrong reg - - - - --- 2015-03-23 Bastian Koppelmann New
target-tricore: fix DVINIT_HU/BU calculating overflow before result - - - - --- 2015-03-20 Bastian Koppelmann New
[PULL,6/6] target-tricore: Add instructions of SYS opcode format - - - - --- 2015-03-16 Bastian Koppelmann New
[PULL,5/6] target-tricore: Add instructions of RRRW opcode format - - 1 - --- 2015-03-16 Bastian Koppelmann New
[PULL,4/6] target-tricore: Add instructions of RRRR opcode format - - 1 - --- 2015-03-16 Bastian Koppelmann New
[PULL,3/6] target-tricore: Add instructions of RRR1 opcode format, which have 0xe3 as first opcode - - 1 - --- 2015-03-16 Bastian Koppelmann New
[PULL,2/6] target-tricore: Add instructions of RRR1 opcode format, which have 0x63 as first opcode - - 1 - --- 2015-03-16 Bastian Koppelmann New
[PULL,1/6] target-tricore: Add instructions of RRR1 opcode format, which have 0xa3 as first opcode - - 1 - --- 2015-03-16 Bastian Koppelmann New
[PULL,0/6] tricore patches for 2.3 - - - - --- 2015-03-16 Bastian Koppelmann New
qemu-system-ppc TCG assert with git master - - - - --- 2015-03-12 Bastian Koppelmann New
[PULL,6/6] target-tricore: Add instructions of RRR1 opcode format, which have 0xc3 as first opcode - - 1 - --- 2015-03-03 Bastian Koppelmann New
[PULL,5/6] target-tricore: Add instructions of RRR1 opcode format, which have 0x43 as first opcode - - 1 - --- 2015-03-03 Bastian Koppelmann New
[PULL,4/6] target-tricore: Add instructions of RRR1 opcode format, which have 0x83 as first opcode - - 1 - --- 2015-03-03 Bastian Koppelmann New
[PULL,3/6] target-tricore: Add instructions of RRR2 opcode format - - 1 - --- 2015-03-03 Bastian Koppelmann New
[PULL,2/6] target-tricore: fix msub32_suov return wrong results - - 1 - --- 2015-03-03 Bastian Koppelmann New
[PULL,1/6] target-tricore: Fix RLC_ADDI, RLC_ADDIH using wrong microcode helper - - 1 - --- 2015-03-03 Bastian Koppelmann New
[PULL,0/6] tricore patches for 2.3 - - - - --- 2015-03-03 Bastian Koppelmann New
[6/6] target-tricore: Add instructions of SYS opcode format - - - - --- 2015-02-25 Bastian Koppelmann New
[5/6] target-tricore: Add instructions of RRRW opcode format - - - - --- 2015-02-25 Bastian Koppelmann New
[4/6] target-tricore: Add instructions of RRRR opcode format - - - - --- 2015-02-25 Bastian Koppelmann New
[3/6] target-tricore: Add instructions of RRR1 opcode format, which have 0xe3 as first opcode - - - - --- 2015-02-25 Bastian Koppelmann New
[2/6] target-tricore: Add instructions of RRR1 opcode format, which have 0x63 as first opcode - - - - --- 2015-02-25 Bastian Koppelmann New
[1/6] target-tricore: Add instructions of RRR1 opcode format, which have 0xa3 as first opcode - - - - --- 2015-02-25 Bastian Koppelmann New
[v2,6/6] target-tricore: Add instructions of RRR1 opcode format, which have 0xc3 as first opcode - - - - --- 2015-02-11 Bastian Koppelmann New
[v2,5/6] target-tricore: Add instructions of RRR1 opcode format, which have 0x43 as first opcode - - - - --- 2015-02-11 Bastian Koppelmann New
[v2,4/6] target-tricore: Add instructions of RRR1 opcode format, which have 0x83 as first opcode - - - - --- 2015-02-11 Bastian Koppelmann New
[v2,3/6] target-tricore: Add instructions of RRR2 opcode format - - - - --- 2015-02-11 Bastian Koppelmann New
[v2,2/6] target-tricore: fix msub32_suov return wrong results - - - - --- 2015-02-11 Bastian Koppelmann New
[v2,1/6] target-tricore: Fix RLC_ADDI, RLC_ADDIH using wrong microcode helper - - - - --- 2015-02-11 Bastian Koppelmann New
[6/6] target-tricore: Add instructions of RRR1 opcode format, which have 0xc3 as first opcode - - - - --- 2015-02-10 Bastian Koppelmann New
[5/6] target-tricore: Add instructions of RRR1 opcode format, which have 0x43 as first opcode - - - - --- 2015-02-10 Bastian Koppelmann New
[4/6] target-tricore: Add instructions of RRR1 opcode format, which have 0x83 as first opcode - - - - --- 2015-02-10 Bastian Koppelmann New
[3/6] target-tricore: Add instructions of RRR2 opcode format - - - - --- 2015-02-10 Bastian Koppelmann New
[2/6] target-tricore: fix msub32_suov return wrong results - - - - --- 2015-02-10 Bastian Koppelmann New
[1/6] target-tricore: Fix RLC_ADDI, RLC_ADDIH using wrong microcode helper - - - - --- 2015-02-10 Bastian Koppelmann New
[PULL,v2,9/9] target-tricore: Add instructions of RRR opcode format - - 1 - --- 2015-01-27 Bastian Koppelmann New
[PULL,v2,8/9] target-tricore: Add instructions of RRPW opcode format - - 1 - --- 2015-01-27 Bastian Koppelmann New
[PULL,v2,7/9] target-tricore: Add instructions of RR2 opcode format - - 1 - --- 2015-01-27 Bastian Koppelmann New
[PULL,v2,6/9] target-tricore: Add instructions of RR1 opcode format, that have 0x93 as first opcode - - 1 - --- 2015-01-27 Bastian Koppelmann New
[PULL,v2,5/9] target-tricore: split up suov32 into suov32_pos and suov32_neg - - - - --- 2015-01-27 Bastian Koppelmann New
[PULL,v2,4/9] target-tricore: Fix bugs found by coverity - - - - --- 2015-01-27 Bastian Koppelmann New
[PULL,v2,3/9] target-tricore: calculate av bits before saturation - - - - --- 2015-01-27 Bastian Koppelmann New
[PULL,v2,2/9] target-tricore: Several translator and cpu model fixes - - - - --- 2015-01-27 Bastian Koppelmann New
[PULL,v2,1/9] target-tricore: Add missing ULL suffix on 64 bit constant - - - - --- 2015-01-27 Bastian Koppelmann New
[PULL,v2,0/9] tricore patches - - - - --- 2015-01-27 Bastian Koppelmann New
[PULL,9/9] target-tricore: Add instructions of RRR opcode format - - 1 - --- 2015-01-26 Bastian Koppelmann New
[PULL,8/9] target-tricore: Add instructions of RRPW opcode format - - 1 - --- 2015-01-26 Bastian Koppelmann New
[PULL,7/9] target-tricore: Add instructions of RR2 opcode format - - 1 - --- 2015-01-26 Bastian Koppelmann New
[PULL,6/9] target-tricore: target-tricore: Add instructions of RR1 opcode format, that have 0x93 as… - - 1 - --- 2015-01-26 Bastian Koppelmann New
[PULL,5/9] target-tricore: split up suov32 into suov32_pos and suov32_neg - - - - --- 2015-01-26 Bastian Koppelmann New
[PULL,4/9] target-tricore: Fix bugs found by coverity - - - - --- 2015-01-26 Bastian Koppelmann New
[PULL,3/9] target-tricore: calculate av bits before saturation - - - - --- 2015-01-26 Bastian Koppelmann New
[PULL,2/9] target-tricore: Several translator and cpu model fixes - - - - --- 2015-01-26 Bastian Koppelmann New
[PULL,1/9] target-tricore: Add missing ULL suffix on 64 bit constant - - - - --- 2015-01-26 Bastian Koppelmann New
[PULL,0/9] tricore patches - - - - --- 2015-01-26 Bastian Koppelmann New
[v2,4/4] target-tricore: Add instructions of RRR opcode format - - 1 - --- 2015-01-26 Bastian Koppelmann New
[v2,3/4] target-tricore: Add instructions of RRPW opcode format - - - - --- 2015-01-26 Bastian Koppelmann New
[v2,2/4] target-tricore: Add instructions of RR2 opcode format - - - - --- 2015-01-26 Bastian Koppelmann New
[v2,1/4] target-tricore: target-tricore: Add instructions of RR1 opcode format, that have 0x93 as f… - - - - --- 2015-01-26 Bastian Koppelmann New
[4/4] target-tricore: split up suov32 into suov32_pos and suov32_neg - - - - --- 2015-01-21 Bastian Koppelmann New
[3/4] target-tricore: Fix bugs found by coverity - - - - --- 2015-01-21 Bastian Koppelmann New
[2/4] target-tricore: calculate av bits before saturation - - - - --- 2015-01-21 Bastian Koppelmann New
[1/4] target-tricore: Several translator and cpu model fixes - - - - --- 2015-01-21 Bastian Koppelmann New
[4/4] target-tricore: Add instructions of RRR opcode format - - 1 - --- 2015-01-21 Bastian Koppelmann New
[3/4] target-tricore: Add instructions of RRPW opcode format - - - - --- 2015-01-21 Bastian Koppelmann New
[2/4] target-tricore: Add instructions of RR2 opcode format - - - - --- 2015-01-21 Bastian Koppelmann New
[1/4] target-tricore: target-tricore: Add instructions of RR1 opcode format, that have 0x93 as firs… - - - - --- 2015-01-21 Bastian Koppelmann New
tcg: Add doxygen documentation to the tcg frontend - - - - --- 2015-01-14 Bastian Koppelmann New
tcg: Add documentation for missing tcg-ops - - - - --- 2015-01-10 Bastian Koppelmann New
[PULL,13/13] target-tricore: Add instructions of RR1 opcode format, that have 0xb3 as first opcode - - 1 - --- 2014-12-21 Bastian Koppelmann New
[PULL,12/13] target-tricore: Fix MFCR/MTCR insn and B format offset. - - 1 - --- 2014-12-21 Bastian Koppelmann New
[PULL,11/13] target-tricore: Add missing 1.6 insn of BOL opcode format - - 1 - --- 2014-12-21 Bastian Koppelmann New
[PULL,10/13] target-tricore: Add instructions of RR opcode format, that have 0x4b as the first opco… - - 1 - --- 2014-12-21 Bastian Koppelmann New
[PULL,09/13] target-tricore: Add instructions of RR opcode format, that have 0x1 as the first opcode - - 1 - --- 2014-12-21 Bastian Koppelmann New
[PULL,08/13] target-tricore: Add instructions of RR opcode format, that have 0xf as the first opcode - - 1 - --- 2014-12-21 Bastian Koppelmann New
[PULL,07/13] target-tricore: Add instructions of RR opcode format, that have 0xb as the first opcode - - 1 - --- 2014-12-21 Bastian Koppelmann New
[PULL,06/13] target-tricore: Change SSOV/SUOV makro name to SSOV32/SUOV32 - - 1 - --- 2014-12-21 Bastian Koppelmann New
[PULL,05/13] target-tricore: Fix mask handling JNZ.T being 7 bit long - - - - --- 2014-12-21 Bastian Koppelmann New
[PULL,04/13] target-tricore: pretty-print register dump and show more status registers - - 1 - --- 2014-12-21 Bastian Koppelmann New
[PULL,03/13] target-tricore: add missing 64-bit MOV in RLC format - - 1 - --- 2014-12-21 Bastian Koppelmann New
[PULL,02/13] target-tricore: typo in BOL format - - 1 - --- 2014-12-21 Bastian Koppelmann New
[PULL,01/13] target-tricore: fix offset masking in BOL format - - 1 - --- 2014-12-21 Bastian Koppelmann New
[PULL,00/13] tricore patches - - - - --- 2014-12-21 Bastian Koppelmann New
target-s390x: Add Extract PSW instruction - - - - --- 2014-12-17 Bastian Koppelmann New
[v2,8/8] target-tricore: Add instructions of RR1 opcode format, that have 0xb3 as first opcode - - 1 - --- 2014-12-17 Bastian Koppelmann New
[v2,7/8] target-tricore: Fix MFCR/MTCR insn and B format offset. - - 1 - --- 2014-12-17 Bastian Koppelmann New
[v2,6/8] target-tricore: Add missing 1.6 insn of BOL opcode format - - 1 - --- 2014-12-17 Bastian Koppelmann New
[v2,5/8] target-tricore: Add instructions of RR opcode format, that have 0x4b as the first opcode - - 1 - --- 2014-12-17 Bastian Koppelmann New
[v2,4/8] target-tricore: Add instructions of RR opcode format, that have 0x1 as the first opcode - - 1 - --- 2014-12-17 Bastian Koppelmann New
[v2,3/8] target-tricore: Add instructions of RR opcode format, that have 0xf as the first opcode - - 1 - --- 2014-12-17 Bastian Koppelmann New
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